Fast charge collection in small collection electrode monolithic CMOS pixel sensors - CERN Detector Seminar 29.01.2021 Magdalena Munker
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Fast charge collection in small
collection electrode monolithic
CMOS pixel sensors
CERN Detector Seminar
29.01.2021
Magdalena Munker
Challenging requirements for future High Energy
Physics (HEP) silicon tracking detectors
Requirements for future HEP tracking detectors: CERN-OPEN-2018-006
à Extreme radiation tolerance
à Very fast
à Very large surface
à Very thin
à Ultimate granularity
ALICE ITS4: ATLAS ITK: FCC hh: CLIC 3TeV:
p. 2
Overview on silicon pixel detector technologies
Sketches from Daniel Hynds
Hybrid:
Advantage = separate optimisation sensor r/o chip:
à Fit complex functionality in small area of pixel size required for precision
à Highly optimized sensors
Challenge = interconnects
Planar sensor – bump bonded: Active HV-CMOS sensor –
capacitively coupled:
Silicon On Insulator SOI-CMOS:
Sketches from Daniel
Monolithic:
Advantage = no interconnects, benefit from CMOS imaging industry:
Challenges:
à Large area production with lower costs/effort & reduced material
- Impact of circuitry on sensor & vice versa
à Potential for smaller pixels & large signal/noise
- Trade off between
Large collection electrode Small collection electrode - High field
CMOS:
CMOS: (large collection electrode)
- Low capacitance
(small collection electrode)
p. 3
Outline
Introduction:
• Motivation and overall aim of development
• Standard 180nm small collection electrode CMOS
process
Sensor design optimization towards 1 nanosecond
charge collection time in 180nm process:
• Simulation based optimization
• Measurements
Towards sub-nanosecond charge collection:
• ATTRACT FASTpix project
• 65nm process technology
From: https://indepth.dev/posts/1151/a-deep-dive-into-injectable-and-providedin-in-ivy p. 4
Application of standard CMOS small collection electrode
technology in HEP experiments
MIMOSA – IPHC Strasbourg: INMAPS – STFC : ALPIDE – ALICE ITS3 :
~ STAR collaboration and IPHC Strasbourg ~ ~ N. Guerrini, STFC ~ ~ ALICE collaboration ~
MIMOSA28 in the STAR pixel detector - first • Deep p-well for shielding • Low capacitance < 5fF, zero-suppressed r/o
MAPS system in HEP: New
The INMAPS process: quadruple well for full CMOS in
à ALICE Inner Tracking
First technology prototypeSystem,
allows for full in-pixel CMOS
that closer to• IP,ALPIDE thinner, better
in ITS, area =position
10m2: resolution
The INMAPS process: quadruple7well layers, for12.5fullGpixels in covering 10 m
STFC development, collaboration 2 TowerJazz
with
CMOS in the pixel
Additional deep P-well with implant
5 μm allows complex
position in-pixel CMOS an
resolution
STFC development, in collaboration with TowerJazz
Additional deep P-well implant
Closer: Inner layer radius 39 mm -> 22 mm applications (Tow
Newallows
generation of CMOS
complex in-pixel CMOS and sensors for scientific
100 % fill-factor
New generation of CMOS sensors for scientific applications (TowerJazz CIS 180nm)
Also 5Gb/s transmitter in development
Thinner:
Also 5Gb/s transmitter in development X/X 1.14% -> 0.3 % (inner layers)
Sensors 2008 (8)05336, DOI:10.3390/s8095336
Sensors 2008 (8) 5336, DOI:10.3390/s8095336
Pixel size: 50 x 425 μm2 -> 27 x 29 μm2
https://iopscience.iop.org/article/10.1088/1748-0221/7/08/C08001/meta
https://iopscience.iop.org/article/10.1088/1748-0221/7/08/C08001/meta
https://iopscience.iop.org/article/10.1088/1748-0221/14/01/C01006/meta
https://iopscience.iop.org/article/10.1088/1748-0221/14/01/C01006/meta
http://pimms.chem.ox.ac.uk/publications.php …
courtesy of N. Guerrini, STFC
The ALPIDE (ALICEhttp://pimms.chem.ox.ac.uk/publications.php
Pixel Detector) developed for the…ALICE upgrade (ITS and MFT)
courtesy of
TPAC DECAL
ILC ECAL (CALICE) Calorimetry
will
PIMMS be used for several
CHERWELL other
TOF mass spectroscopy Calorimetry/Tracking
HEP detectors
LASSENA
and other applications
NICA MPDTPAC
(@JINR) sPHENIX
DECAL
(BNL) proton CT (tracking)
ALPIDE for proton CHERWELL
PIMMS CT: ALPIDE in space, CSES:
LASSENA CSES – HEPD2 …
ILC ECAL (CALICE) Calorimetry TOF mass spectroscopy Calorimetry/Tracking
50µm pixel 50µm pixel 70µm pixel 48 µm x 96 µm pixel 50µm pixel, waferscale
Also used for the ALPIDE (27 µm x 29 µm pixel) and MIMOSIS (CBM)
• Twin well 350nm CMOS walter.snoeys@cern.ch
• Quadruple well 180nm CMOS 9
9
• No reverse bias à NIEL ~1012neq/cm2 • Reverse bias of a few volts p. 5
Unification of requirements
Monolithic: Fast charge collection:
• Reduced production effort (no • Increased sensor radiation tolerance
interconnects needed, especially • Improved timing precision
relevant for high granularity) • Increased efficiency for thin sensors
• Reduced costs (especially relevant for
large scale future silicon tracking
detectors)
• Reduced material (especially relevant
for high precision measurements at
future HEP experiments)
Femto-Farad sensor capacitance:
• Reduced noise and increased gain
à Large ratio of signal/noise (important for
precise resolution and reduced power
consumption)
https://www.callcentrehelper.com/8x8-poly-scansource-team-up-148512.htm p. 6
Motivation to achieve fast charge collection in monolithic
CMOS sensors with a small collection electrode
Opening of window to a large range of applications:
Future LHC experiments
(radiation tolerance)
Medical
Future collider applications
experiments
(radiation tolerance,
fast, thin)
Industrial applications
(far future: LIDAR, single
photon detection)
La femme a la fenetre, Salvatore Dali p. 7
Monolithic small capacitance silicon pixel technology
180nm standard imaging technology process
Low resistivity substrate
p. 8
Monolithic small capacitance silicon pixel technology
180nm standard imaging technology process
High resistivity epitaxial layer grown
on low resistivity substrate:
• No backside implantation
necessary
High resistivity epitaxial layer
Low resistivity substrate • Very high resistivities possible (a
few kΩ⋅cm, needed for depletion)
• Limited in thickness to ≤ 40μm
p. 9
Monolithic small capacitance silicon pixel technology
180nm standard imaging technology process
Reduced size of collection electrode for
Small collection electrode
femto-Farad capacitance:
Small sensor junction
à Larger voltage excursion for smaller
capacitance
High resistivity epitaxial layer
à Higher signal/noise and reduced
Low resistivity substrate analogue power consumption
à Note: small size of collection electrode
leads to small sensor junction
p. 10Monolithic small capacitance silicon pixel technology
180nm standard imaging technology process
V(reset) V(bias) V(reset)
Placement of full CMOS circuitry inside pixel
matrix in well separated from collection
Small collection electrode
electrode:
Small sensor junction
à Monolithic design with small capacitance
P-wells shielding full CMOS
High resistivity epitaxial layer à Sensor bias limited by circuitry to -6V
Low resistivity substrate à P-well changes electric field and charge
collection in active sensor volume
p. 11Why 3D finite element TCAD simulations?
Sensor simulation:
• Small collection electrode and small sensor pn-junction
à Electric field varies over orders of magnitude over the pixel cell
https://silvaco.com
• With the different wells, the epitaxial layer and substrate the doping Used for studies
concentration in the active sensors ranges over >5 orders of magnitude presented here
à Impacts mobility, drift velocity, recombination, …
à Small collection electrode CMOS sensors need to be simulated in TCAD https://www.synopsys.com
Different options for performance evaluation: Transient TCAD:
CLICdp Timepix3 test-beam telescope: • Self-consistent and detailed
• BUT: very computing intensive
Test-beam:
• Realistic measurements, Monte-Carlo tools ‘on top’ of TCAD sensor simulations:
always needed • Fast, high statistics
• BUT: • Access to full performance
Time and resources
S. Spannagel et al.: Allpix2: A Modular Simulation Framework for
consuming Silicon Detectors, 10.1016/j.nima.2018.06.020
à Slow turn-around H. Schindler et al., https://garfieldpp.web.cern.ch/garfieldpp/
p. 123D TCAD - electric field and depletion
Electrostatic potential (color scale) and depletion (white line)
for 25μm epitaxial layer thickness, standard process:
Limited depletion:
à Significant contribution from diffusion:
• Excellent spatial precision
• But:
Edge of depleted region
around collection electrode • Reduced charge collection time,
reduced radiation tolerance and time
stamping capability
• Reduced seed signal, reduced
efficiency before irradiation
Even for high resistivity epitaxial layer (a few kΩ⋅cm) and maximal sensor bias voltage, the depletion in the
standard process is very limited
p. 13The electric field minimum at the pixel edges
Electric field in depth (color scale) and depletion (white line) for
25μm epitaxial layer thickness, standard process:
Electrostatic potential (color scale) streamlines (black arrows)
for 25μm epitaxial layer thickness, standard process:
Ele
mini ctric fiel
mum d
i n se
nsor
Electric field minimum in sensor focusses streamlines and introduced complex electric field configuration
à Performance not scalable with geometry parameters
p. 143D TCAD – charge collection in the standard process
Transient 3D TCAD simulation setup: Electron density 0.5ns after signal generation:
Current pulse:
Cutplane
Star symbol
Particle = electric field minimum
Particle
Charges are focused into electric field minimum à slow down of charge collection
p. 153D TCAD – charge collection in the standard process
Transient 3D TCAD simulation setup: Electron density 1.5ns after signal generation:
Current pulse:
Cutplane
Star symbol
Particle = electric field minimum
Particle
Charges are focused into electric field minimum à slow down of charge collection
p. 153D TCAD – charge collection in the standard process
Transient 3D TCAD simulation setup: Electron density 2.5ns after signal generation:
Current pulse:
Cutplane
Star symbol
Particle = electric field minimum
Particle
Charges are focused into electric field minimum à slow down of charge collection
p. 153D TCAD – charge collection in the standard process
Transient 3D TCAD simulation setup: Electron density 3.5ns after signal generation:
Current pulse:
Cutplane
Star symbol
Particle = electric field minimum
Particle
Charges are focused into electric field minimum à slow down of charge collection
p. 153D TCAD – charge collection in the standard process
Transient 3D TCAD simulation setup: Electron density 4.5ns after signal generation:
Current pulse:
Cutplane
Star symbol
Particle = electric field minimum
Particle
Charges are focused into electric field minimum à slow down of charge collection
p. 153D TCAD – charge collection in the standard process
Transient 3D TCAD simulation setup: Electron density 6.5ns after signal generation:
Current pulse:
Cutplane
Star symbol
Particle = electric field minimum
Particle
Charges are focused into electric field minimum à slow down of charge collection
p. 153D TCAD – charge collection in the standard process
Transient 3D TCAD simulation setup: Electron density 9.5ns after signal generation:
Current pulse:
Cutplane
Star symbol
Particle = electric field minimum
Particle
Charges are focused into electric field minimum à slow down of charge collection
p. 153D TCAD – charge collection in the standard process
Transient 3D TCAD simulation setup: Electron density 14.5ns after signal generation:
Current pulse:
Cutplane
Star symbol
Particle = electric field minimum
Particle
Charges are focused into electric field minimum à slow down of charge collection
p. 15Impact of diffusion and field minimum on performance
Performance observables from test beam measurements and Allpix2 (MC) + TCAD simulations:
S. Spannagel, K. Dort, M. Munker et al., DOI: 10.1016/j.nima.2020.163784 , CERN-THESIS-2018-202
Comparison to standard planar sensor (grey dashed line):
• Low detection threshold < 100 electrons
• Large clusters à significantly reduced efficiency and improved resolution
• Charge collection times tens of ns, compared to O(ns) in standard planar technologies
The small collection electrode standard process has an excellent spatial precision, but slow charge
collection (reduced radiation hardness and timing) and reduced detection efficiency
p. 16The two fundamental limits of the standard sensor process
Electric field in depth (color scale) and depletion (white line) for
25μm epitaxial layer thickness, standard process:
1. Small sensor junction:
à Limited field and depletion
à Solution:
Introduction of deep n-implant
2. Electric field minimum:
à Long charge collection times
à Solution: Edge of depleted region
Introduction of special implant around collection electrode
structures
p. 17Modified sensor process
180nm modified imaging technology process: Add large deep low dose n-implant:
V(reset) V(bias) V(reset)
• Large sensor junction
à Full lateral depletion
Small collection electrode
Deep low dose n-implant • Isolation of p-wells and substrate
à Substrate voltage not limited by circuitry,
P-wells shielding full CMOS high sensor bias tens of volts
Large sensor junctions High resistivity epitaxial layer
Low resistivity substrate
• Initially developed within ALICE ITS upgrade
W. Snoeys et al., DOI: 10.1016/j.nima.2017.07.046
• Further R&D by ATLAS ITk CMOS development together with STREAM project
• H. Pernegger et al., https://doi.org/10.1016/j.nima.2018.07.043
• Investigated within the CLICdp tracking detector development
M. Munkeret al., DOI: 10.1016/j.nima.2019.02.049
V(sub) p. 18Development of depletion in modified process
Electrostatic potential (color scale) and depletion Gain and minimum threshold
(white line) for 25μm epitaxial layer thickness: vs. bias voltage:
VRESET = 0V, VPWELL = 0V, VSUB = 0V
Complex multi-junction process:
Iraklis Kremastiotis et al., DOI: 10.22323/1.370.0039
• Depletion from p-wells into deep n-layer:
à P-well voltage essential to fully deplete around collection electrode and maintain small sensor capacitance
• Depletion from deep planar junction into epitaxial layer:
à Substrate voltage essential for depletion in depth p. 19Development of depletion in modified process
Electrostatic potential (color scale) and depletion Gain and minimum threshold
(white line) for 25μm epitaxial layer thickness: vs. bias voltage:
VRESET = 0.16V, VPWELL = -1.2V, VSUB = -1.2V
Complex multi-junction process:
Iraklis Kremastiotis et al., DOI: 10.22323/1.370.0039
• Depletion from p-wells into deep n-layer:
à P-well voltage essential to fully deplete around collection electrode and maintain small sensor capacitance
• Depletion from deep planar junction into epitaxial layer:
à Substrate voltage essential for depletion in depth p. 19Development of depletion in modified process
Electrostatic potential (color scale) and depletion Gain and minimum threshold
(white line) for 25μm epitaxial layer thickness: vs. bias voltage:
VRESET = 0.32V, VPWELL = -2.4V, VSUB = -2.4V
Complex multi-junction process:
Iraklis Kremastiotis et al., DOI: 10.22323/1.370.0039
• Depletion from p-wells into deep n-layer:
à P-well voltage essential to fully deplete around collection electrode and maintain small sensor capacitance
• Depletion from deep planar junction into epitaxial layer:
à Substrate voltage essential for depletion in depth p. 19Development of depletion in modified process
Electrostatic potential (color scale) and depletion Gain and minimum threshold
(white line) for 25μm epitaxial layer thickness: vs. bias voltage:
VRESET = 0.48V, VPWELL = -3.6V, VSUB = -3.6V
Complex multi-junction process:
Iraklis Kremastiotis et al., DOI: 10.22323/1.370.0039
• Depletion from p-wells into deep n-layer:
à P-well voltage essential to fully deplete around collection electrode and maintain small sensor capacitance
• Depletion from deep planar junction into epitaxial layer:
à Substrate voltage essential for depletion in depth p. 19Development of depletion in modified process
Electrostatic potential (color scale) and depletion Gain and minimum threshold
(white line) for 25μm epitaxial layer thickness: vs. bias voltage:
VRESET = 0.64V, VPWELL = -4.8V, VSUB = -4.8V
Complex multi-junction process:
Iraklis Kremastiotis et al., DOI: 10.22323/1.370.0039
• Depletion from p-wells into deep n-layer:
à P-well voltage essential to fully deplete around collection electrode and maintain small sensor capacitance
• Depletion from deep planar junction into epitaxial layer:
à Substrate voltage essential for depletion in depth p. 19Development of depletion in modified process
Electrostatic potential (color scale) and depletion Gain and minimum threshold
(white line) for 25μm epitaxial layer thickness: vs. bias voltage:
VRESET = 0.8V, VPWELL = V, VSUB = -6V
Complex multi-junction process:
Iraklis Kremastiotis et al., DOI: 10.22323/1.370.0039
• Depletion from p-wells into deep n-layer:
à P-well voltage essential to fully deplete around collection electrode and maintain small sensor capacitance
• Depletion from deep planar junction into epitaxial layer:
à Substrate voltage essential for depletion in depth p. 19P-well sensor bias voltage dependence for the
modified process Electrostatic potential (color scale) and depletion
(white line) for VPWELL = -0V:
P-well sensor bias is needed for depletion around
collection electrode (to maintain low sensor capacitance)
Reduced depletion in depth for higher p-well sensor bias:
• P-wells are ramped up to voltage of backside
à Voltage difference between substrate and p-wells is
reduced
VS
UB = -6
V, V
RES
ET =0
.8V
à Example of complexity of sensor design and the need of 3D TCAD simulations to understand performance
p. 20P-well sensor bias voltage dependence for the
modified process Electrostatic potential (color scale) and depletion
(white line) for VPWELL = -2V:
P-well sensor bias is needed for depletion around
collection electrode (to maintain low sensor capacitance)
Reduced depletion in depth for higher p-well sensor bias:
• P-wells are ramped up to voltage of backside
à Voltage difference between substrate and p-wells is
reduced
VS
UB = -6
V, V
RES
ET =0
.8V
à Example of complexity of sensor design and the need of 3D TCAD simulations to understand performance
p. 20P-well sensor bias voltage dependence for the
modified process Electrostatic potential (color scale) and depletion
(white line) for VPWELL = -4V:
P-well sensor bias is needed for depletion around
collection electrode (to maintain low sensor capacitance)
Reduced depletion in depth for higher p-well sensor bias:
• P-wells are ramped up to voltage of backside
à Voltage difference between substrate and p-wells is
reduced
VS
UB = -6
V, V
RES
ET =0
.8V
à Example of complexity of sensor design and the need of 3D TCAD simulations to understand performance
p. 20P-well sensor bias voltage dependence for the
modified process Electrostatic potential (color scale) and depletion
(white line) for VPWELL = -6V:
P-well sensor bias is needed for depletion around
collection electrode (to maintain low sensor capacitance)
Reduced depletion in depth for higher p-well sensor bias:
• P-wells are ramped up to voltage of backside
à Voltage difference between substrate and p-wells is
reduced
VS
UB = -6
V, V
RES
ET =0
.8V
à Example of complexity of sensor design and the need of 3D TCAD simulations to understand performance
p. 20P-well sensor bias voltage dependence for the
modified process Electrostatic potential (color scale) and depletion
(white line) for VPWELL = -6V:
P-well sensor bias is needed for depletion around
collection electrode (to maintain low sensor capacitance)
Reduced depletion in depth for higher p-well sensor bias:
• P-wells are ramped up to voltage of backside
à Voltage difference between substrate and p-wells is
reduced
VS
UB = -6
V, V
RES
ET =0
.8V
à Example of complexity of sensor design and the need of 3D TCAD simulations to understand performance
p. 20Current pulse for MIP traversing pixel corner
for different backside bias after irradiation:
Substrate bias voltage dependence
for the modified process
M. Munker et al., DOI: 10.1088/1748-0221/14/05/C05013
Electrostatic potential (color scale) and electric field streamlines (arrow-lines):
A higher backside bias not necessarily improves the performance
à Can not compensate radiation induced efficiency loss with higher sensor bias
p. 21Impact of field minimum on performance
~ ATLAS ITk CMOS collaboration and STREAM project ~
MALTA: fully monolithic small collection electrode 180nm CMOS chip with asynchronous
readout, developed within the STREAM project for the ATLAS ITk upgrade R. Cardella et al., 10.1088/1748-0221/14/06/c06019
2 x 2 in-pixel efficiency MALTA, irradiated 1.5x1015neq/cm2, different substrate bias VSUB:
A. Sharma et al., https://indico.cern.ch/event/773447/contributions/3371308/attachments/1822715/2981970/ASharma_AIDA_AnnualMeeting_2019_talk_small.pdf
VSUB= -9V VSUB= -15V VSUB= -20V
• Efficiency loss in region of field minimum due long drift path
• Effect stronger for high substrate bias, as predicted by the simulations
à Need to mitigate impact of electric field minimum on performance
p. 22Additional sensor optimization
Gap in deep n-implant: Additional p-implant:
V(reset) V(bias) V(reset) V(reset) V(bias) V(reset)
Small collection electrode
P-wells shielding full CMOS
Deep low dose n-implant
Vertical junctions High resistivity epitaxial layer Vertical junctions
Low resistivity epitaxial substrate
V(sub) V(sub) p. 23bol in the figure. As visualised by
or depth results in a pushsensor
Additional of charge optimization –
2019 JINST
is electric field minimum. For the
mitigation of field minimum
nent of the electric field is crucial. M. Munker et al., DOI: 10.1088/1748-0221/14/05/C05013
Electrostatic potential (color scale), electric field streamlines (arrow-lines) and electric field minimum (star-symbol):
Electrostatic potential:
Modified process with deep n-implant: Gap in deep n-implant: Additional p-implant:
à The gap and the additional p-implant bent the streamlines away from the minimum to the collection electrodes
ocess with a pixel
à Reduced driftsize
pathof 36.4 µm
+ charges ⇥ get pushed and trapped in minimum
do not
ar symbol indicates
à Faster the electric field
charge collection
p. 24Additional sensor optimization – mitigation of field minimum
Electron density 0.5ns after signal generation for the different sensor designs:
Standard process: Modified process: Gap in deep n-implant:
Particle Particle Particle
= electric field minimum
p. 25Additional sensor optimization – mitigation of field minimum
Electron density 1.5ns after signal generation for the different sensor designs:
Standard process: Modified process: Gap in deep n-implant:
Particle Particle Particle
= electric field minimum
p. 25Additional sensor optimization – mitigation of field minimum
Electron density 2.5ns after signal generation for the different sensor designs:
Standard process: Modified process: Gap in deep n-implant:
Particle Particle Particle
= electric field minimum
p. 25Additional sensor optimization – mitigation of field minimum
Electron density 3.5ns after signal generation for the different sensor designs:
Standard process: Modified process: Gap in deep n-implant:
Particle Particle Particle
= electric field minimum
p. 25Additional sensor optimization – mitigation of field minimum
Electron density 4.5ns after signal generation for the different sensor designs:
Standard process: Modified process: Gap in deep n-implant:
Particle Particle Particle
= electric field minimum
p. 25Additional sensor optimization – mitigation of field minimum
Electron density 6.5ns after signal generation for the different sensor designs:
Standard process: Modified process: Gap in deep n-implant:
Particle Particle Particle
= electric field minimum
p. 25Additional sensor optimization – mitigation of field minimum
Electron density 9.5ns after signal generation for the different sensor designs:
Standard process: Modified process: Gap in deep n-implant:
Particle Particle Particle
= electric field minimum
p. 25Additional sensor optimization – mitigation of field minimum
Electron density 14.5ns after signal generation for the different sensor designs:
Standard process: Modified process: Gap in deep n-implant:
Particle Particle Particle
= electric field minimum
p. 25Additional sensor optimization – mitigation of field minimum
Single pixel current pulse from transient 3D TCAD:
Standard process
Modified process with deep n-layer
Gap in deep n-layer
à Mitigation of impact of electric field minimum on charge collection, order of magnitude improvement in
charge collection speed
p. 26Impact of new sensor designs on charge
sharing and spatial resolution
~ Thanks to D. Dannheim and the CLIC test-beam crew, S. Spannagel and the DESY test-beam crew ~
CLICTD: A fully monolithic CLIC tracker 180nm small collection electrode CMOS chip with simultaneous ToT and
ToA readout Iraklis Kremastiotis et al., DOI: 10.22323/1.370.0039 Corryvreckan: A Modular 4D Track Reconstruction and Analysis Software for Test Beam Data,
CLICdp-Pub-2020-005
CLICTD sensor design: Cluster column size vs. threshold: ~ K. Dort ~
CLICdp
Spatial column resolution vs. threshold:
CLICdp
spatial resolution (col.) [µm]
mean cluster column size
Continuous n-implant
1.4
Gap in n-implant 10
1.3
9
1.2
30μm
8
1.1 7 Continuous n-implant
37.5μm Gap in n-implant
1 6
Columns 0 500 1000 1500 2000 2500
0 500 1000 1500 2000 2500
threshold [e] ~ K. Dort ~ threshold [e]
Figure
Figure 10: 16: Spatial
Mean resolution
cluster in row direction
size in column directionasasa function of thresh-
a function of Figure Figure 17: cluster
11: Mean Spatialsize
resolution in column
in row direction as adirection
function as a function of
of detection
old for both pixel flavours. threshold for both pixel flavours.
The gap in the deep n-implant reduces the charge sharing à less spatial precision à smaller node technologies
detection threshold threshold.
537 6.5. Time resolution
p. 27Impact of new sensor designs on time
stamping capability Timing resolution vs. threshold after
time-walk correction ~ K. Dort ~
CLICdp
18
timing resolution [ns]
Continuous n-implant
16 Gap in n-implant
In-pixel timing resolution before time walk correction
14
No gap in deep n-implant: Gap in deep n-implant:
15
CLICdp
15 15
CLICdp
15 12
- thit) [ns]
- thit) [ns]
in-pixel row [µm]
in-pixel row [µm]
10 10 10 10 10
5 5 5 5
8
track
track
0 0 0 0
(t
(t
-5 -5 -5 -5 6
-10 -10 -10 -10
0 500 1000 1500 2000 2500
-15 -15 -15 -15 threshold [e]
-10 0 10 -10 0 10
~ K. Dort ~
in-pixel column [µm] in-pixel column [µm]
Figure 24: time residuals between track timestamp and CLICTD
Figure 25: Time resolution as a function of the detection threshold.
timestamp after time-walk correction.
Figure 19: In-pixel time residuals for the pixel flavour with continuous Figure 20: In-pixel time residuals for the pixel flavour with gap in the
More precise timing resolution for design with gap:
à Reduced timing spread over pixel cell with gap due to:
n-implant before time-walk correction. n-implant before time-walk correction.
à Accelerated charge collection (sensor effect)
indicating that the time resolution degrades in the pixel
• Reduced charge sharingedge
(less time-walk)
571
regions [8]. 572 à Disclaimer: timing resolution limited by frontend
The one dimensional residual distributions are depicted
• Accelerated charge collection (sensor effect) in Fig. 24 for both pixel flavours. The time resolution is
calculated using the RMS of the central 3 (99.7%) of the à Need fast circuitry to access full sensor optimization
distribution, which amounts to 6.6 ns and 5.9 ns for the
pixel flavour with continuous n-implant and gap in the
p. 28Impact of new sensor designs on charge
sharing and efficiency
Cluster column size vs. threshold:
CLICdp ~ K. Dort ~ Efficiency vs. threshold:
CLICdp ~ K. Dort ~
mean cluster column size
efficiency
1.4 Continuous n-implant 1
Gap in n-implant
1.3
0.95
1.2
0.9
1.1
Continuous n-implant
Gap in n-implant
1
0 500 1000 1500 2000 2500 0 200 400 600 800 1000 1200
threshold [e] threshold [e]
Figure 10: Mean cluster
Figure 12: size in column
Cluster direction
seed signal as a function
distribution for bothofpixel
Figure 11: at
flavours Mean cluster
Figuresize
13: in row
Hit directionefficiency
detection as a function of detection
as a function of threshold for both
detection threshold à The gap in the n-implant reduces the charge sharing increases the single pixel signal and efficiency
nominal conditions. threshold. pixel flavours.
à Efficient operation window (> 99%) extended by > x2
à Sensor design optimization is essential for thin sensors
p. 29Mini-Malta efficiency after irradiation of 1e15 neq/cm2
Impact of new sensor designs on
for different sensor design variants:
Enlarged transistors Standard transistors
efficiency after irradiation Additional
p-implant
Additional
p-implant
Mini-MALTA sensor design:
Measurements from Mini-MALTA:
~ ATLAS ITk CMOS collaboration and STREAM project ~
M. Dyndal et al.,10.1088/1748-0221/15/02/p02005
Gap in Gap in
Regions of n-layer n-layer
gap or
additional
p-implant
36.5 μm
High efficiency after irradiation due to: Continuous Continuous
n-layer
n-layer
1. Fast charge collection and reduced trapping probability
2. Reduced charge sharing and higher single pixel signal
à The sensor optimization made these sensors radiation hard up to levels of 1015neq/cm2
Further: Cz-starting material instead of epitaxial layer to overcome limitations in sensor thickness and resulting
signal (~2k electrons for 30 μm epitaxial layer thickness before irradiation) H. Pernegger et al., DOI:https://doi.org/10.1016/j.nima.2020.164381 p. 30Implementation in prototype chips
TowerJazz 180nm chips with new sensor design solutions:
CLICTD: ATTRACT FASTPIX: MALTA/Monopix: MIMOSIS: INVESTIGATOR:
Future e+e- colliders: Future HEP experiments: HL-LHC and future Antiproton and ion research: R&D:
Improved timing Improved timing precision, pp-colliders: Increased sensor radiation Investigation of
precision and high sensor radiation tolerance Increased sensor tolerance and high efficiency for analogue response
efficiency for thin sensors radiation tolerance thin sensors
T. Kugathasan et al.,
I. Caicedo et al., J. Baudot et al., M. Mirnova et al.,
Iraklis Kremastiotis et al., https://doi.org/10.1016/j.ni
10.1088/1748-0221/14/06/C06006 https://indico.cern.ch/event/810687/contribu DOI: 10.1016/j.nima.2019.163381
DOI: 10.22323/1.370.0039 ma.2020.164461
tions/3451974/attachments/1876738/31142
H. Pernegger et al., 28/CMOSsensorStrasbourg_Baudot_VXDUpgr
DOI:https://doi.org/10.1016/j.nima.2020.164381 ade_2019-07-09.pdf
~ Only a few example references are given, great effort in design and characterization from many groups ~
p. 31Pushing further to the sub-nanosecond range
General question = what is the scalability and perspective of these concepts?:
• Are these improvements for a specific process technology or concepts of general
relevance?
• Do we still need these modifications at small pixel pitch?
EU funded ATTRACT FASTpix project, W. Snoeys et al.:
• Combine small capacitance with ultra-fast charge collection in monolithic small
pixel design
à Optimize sensor for sub-nanosecond charge collection
From: https://www.thecoachingdocs.com/blog/2019/2/25/why-pushing-a-rock-up-a-hill-is-actually-good-for-yousometimes
p. 32Trade-off between capacitance and lateral field
P-well
Collection electrode
Spacing = distance between collection electrode and p-well
Lateral field and depletion: Capacitance vs. p-well voltage: Current pulse for particle incident at corner:
Spacing = 6μm
Spacing = 6μm
Spacing = 5μm
Spacing = 5μm Spacing = 4μm
Spacing = 4μm
à Trade-off between lateral field (speed of charge collection) and capacitance (noise, threshold)
à Note also large performance variations for only small change (1 μm different spacing) à complex optimization
p. 33Resolving trade-off between fast charge collection
and capacitance Lateral field (color scale):
Standard opening:
P-well fingers, top view on pixel cell:
Deep n-implant
Deep p-well
P-well fingers:
Collection
electrode
Pitch = 36.6 μm
à Depletion around collection electrode and small (~femto-Farad) capacitance maintained
à Impact on lateral field (charge collection) small since deep p-well is only extended in small ‘fingers’
p. 34Hexagonal pixels - minimizing the edge regions
Simulated hexagonal unit cell – Comparison hexagonal to square pixel cell
electrostatic potential: charge vs. time for particle incident at pixel corner:
m
1 5μ
c h=
Pit
à Hexagonal design reduces the number of neighbors and charge sharing à higher efficiency
à Hexagonal design minimizes the edge regions à faster charge collection
p.
p. 17
35Summary of sensor optimization for FASTpix
T. Kugathasan et al., https://doi.org/10.1016/j.nima.2020.164461
Summary of main optimized parameters:
Pitch à hexagonal design
Opening of p-wells à retracted deep p-well, ‘p-well fingers’
Collection electrode size à trade-off between capacitance and lateral field
Deep n-implant dose à trade-off between capacitance and radiation hardness
Depth of deep n-implant à trade-off between contact to collection electrode and optimized field configuration
Example of complex 3D TCAD 3D TCAD current pulse for particle incident at pixel corner:
structure:
Example pixel layout:
Collection Collection
electrode electrode
Deep n-implant
Epitaxial layer
p. 36ATTRACT FASTpix - sub-nanosecond charge collection in
CMOS pixel sensors T. Kugathasan et al., https://doi.org/10.1016/j.nima.2020.164461
FASTpix chip layout: Pixel matrix layout on hexagonal grid: ZOOM:
4 analogue channels 64 (4 x 16) digital channels
Design of 32 hexagonal sub-matrixes:
• Combination of gap and p-implant, retracted deep p-well, p-well fingers,…
p. 37FASTpix results for charge collection times
Rise-time from Sr-90
Rise-time from Sr-90 exposition
Rise time distribution measured in
20%-80% rise-time 20%-80%
Rise time distributionrise-time
measured with Rise20%-80% rise-time
time distribution measured with
test-beam, ALICE Investigator “modified process” (deep n-layer)
“modified
standardprocess”
& modified(deep
process:n-layer) “standard process”
source, FASTpix standard process: source, FASTpix re-optimised process:
-4V/-4V pwell/backside -4V/-4V pwell/backside -4V/-4V pwell/backside
10 x 10 μm2 matrix 10 x 10 μm2 matrix 10 x 10 μm2 matrix
CERN-THESIS-2018-202 Pitch = 10 μm Pitch = 10 μm
Pitch = 28 μm ~ E. Buschmann ~ ~ E. Buschmann ~
• Narrow rise-time distribution for modified process • Narrow rise-time distribution for modified pro
• Rise time fluctuations
Significantly Rise time fluctuations
wider distribution for standard process, • Significantly wider distribution for standard p
in the order
as expected of uniform E-field
from less in the order of Rise time fluctuations in the
as expected from less uniform E-field
tens of
à Direct nanoseconds
sensitivity to charge-collection time for the different
a few process variants
nanoseconds sub-nanosecond
à Direct range
sensitivity to charge-collection time fo
November 4, 2020 ATTRACT FASTpix 16
November 4, 2020 ATTRACT FAS
à Sensor process optimization improve performance significantly, even at very small pixel pitch of 10 μm
p. 38Outlook to 65nm development
~ M. Campbell, W. Snoeys, G. Aglieri Rinella ~
~ ALICE collaboration~
~ CERN EP R&D~
• IPHC: rolling shutter larger matrices
• DESY: pixel test structure (using charge amplifier with Krummenacher feedback)
• RAL: LVDS/CML receiver/driver
• NIKHEF: bandgap, T-sensor, VCO ~ Significant contribution from different groups ~
• CPPM: ring-oscillators
• Yonsei: amplifier structures
• CERN: Transistor test structures, analog pixel (4x4 matrix) test matrices in several versions (in collaboration with IPHC
with special amplifier), digital pixel test matrix (DPTS) (32x32), pad structure for assembly testing p. 39Outlook to 65nm development
~ J. Hasenbichler ~
ITS3 20um pitch - Efficiency
A ‘pancake-like’ sensor: Efficiency vs. sensor threshold from TCAD + MC(Garfield++):
Efficiency [%]
100
%
• Thinner epitaxial layer 98
à Increased ratio of pitch/thickness
96
p-well
94
thickness
collection
electrode
substrate 92
pitch
90 standard
• No depletion and field between p-wells 88
modified
and substrate without optimization gap
• Lots of diffusion and charge sharing https://www.thekitchn.com/how-to-make-single-serve-
pancakes-233533
86
60 80 100 120 140 160 180 200
electron
Sensor threshold [electrons]
1. Process optimization improves performance in 65nm technology
à Generic concepts, not specific to exact 180nm process technology
2. Due to increased ratio of pitch/thickness, the sensor process optimization is more needed in the 65nm process
p. 40Summary
• Small collection electrode CMOS process has been optimized for fast charge collection:
àCombination of monolithic + femto-Farad capacitance + fast charge collection opens window to many
applications (future HEP experiments, medical and industrial applications)
• Generic optimization, applicable to different process technologies, improving various
requirements simultaneously:
• Efficiency before irradiation à sensor optimizations essential for the 65nm process
• Radiation hardness
• Time stamping capability
• Optimized designs have been implemented in many different prototype chips
àProof of the concepts that have been developed in simulations
~ From charge collection times of tens of nanoseconds to well below one nanosecond ~
p. 41Acknowledgements • To Walter Snoeys, with whom I have done the simulation based sensor optimization together, and Dominik Dannheim my direct supervisor, for being fantastic mentors over many years • To Katharina Dort and Jan Hasenbichler for their hard work and great results • To Simon Spannagel for the collaboration and Monte Carlo studies • To the CLICdp, ALICE ITS, ATLAS ITk and STREAM collaborations
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