Intégration 3D pour les - datacenters haute performance - IRT Nanoelec
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From Technologies to Market Intégration 3D pour les datacenters haute performance IRT Nanoelec– 05/04/17 Emilie Jolivet jolivet@yole.fr Eric Mounier mounier@yole.fr Chanel fashion runway at Paris’ Grand Palais – October 2016 © 2016 © 2015
DATA TRAFFIC & HYPERSCALE DATACENTER Data traffic expected to triple between 2015 and 2020! Hyperscale datacenter Microsoft, San Antonio TX 5th biggest hyperscale datacenter 477 000 sq ft ~ 44 314 m² ~ 4 hectares ©2015 | www.yole.fr | Name of the event 2
WHERE ARE THE TECHNICAL CHALLENGES? • For the next generation of data centers, Data center three main technical aspects are targeted: • Storage capacity • Power consumption • Data flow Storage Power • On the storage side, higher density capacity consumption Data flow Equipment capacity and higher speed are sought manufacturers • Related to power consumption, more are constantly efficient systems and less loss sources are pursuing needed Technical technical breakthroughs • For data flow, faster data transmission breakthroughs and less-consuming solutions are required Power Cooling IT equipment equipment systems ©2016 | www.yole.fr | Silicon Photonics for Data Centers and Other Applications 2016 report 3
INTRA-DATA CENTER CONNECTIVITY WILL HAVE THE HIGHEST CAGR (SOURCE: INTEL) The graph below shows that the largest market value growth for 40G+ data rate in data centers will be IN the data center (either across the data center, across the rows, or in the racks) Data center 40G+ TAM $5.1B In 2016, 40% of data traffic was within Between DC datacenters. In $2.1B 2020, it will be Across DC 80% $1.2B Across row Accross In rack 2016 2018 2020 ©2016 | www.yole.fr | Silicon Photonics for Data Centers and Other Applications 2016 report 4
3DIC MARKET DRIVERS Electrical performance Interconnect speed, bandwidth and reduced power consumption Performance- drivenWide IO DRAM “More than Moore” memory CPU Heterogeneous integration GPU RF-SiP Co-integration of Flash Power. RF+logic+memory + 3DIC drivers sensors in a reduced space unchanged!! 3D IC Analog. Optimum Market Access Conditions Cost-driven Form factor- Sensors Partitioning driven 3D vs. “More Moore” CIS Can 3D be cheaper Density than going to the next FPGA Achieving the highest lithography node? capacity / volume ratio ©2016 | www.yole.fr | 3DASIP 2016 5
3D IN A DATA CENTRE • Copper is still used for top-of-rack server switches because distance is short. When distance increases, optical links are used since they do not suffer from bandwidth limitation. Most bandwidth is INSIDE DC. • For 1 “web search” up to 1,000+ servers can be addressed • One data center: 50k - 200k servers Core switches Long-reach optics: 25Gb Top-of-rack Server connections are typically copper Interconnection (spine) switch Switch-to-switch connections are Access (leaf) optical fibers 25Gb switches In-rack (3m): Across row (10 - 100Gb 100m): 40 - 100Gb Server cabinets Across DCs (100m-2km): 25-40Gb Between DCs (10 - 500km): 100Gb ©2016 | www.yole.fr | Silicon Photonics for Data Centers and Other Applications 2016 report 6
ADVANCED PACKAGING PLATFORMS AREA OF INTEREST FOR TODAY PRESENTATION ©2016 | www.yole.fr | 3D TSV & 2.5D Interconnect - Business Update Report 2016 7
3D TECHNOLOGIES DEFINITION 3D technology: stacking layers on layers 2.5D technology: assembly of chips on interposer • It can be Memory on Memory or Logic on Memory • Several types of chips can be assembled on an interposer (GPU, CPU, memory, NPU,….) • Large die partitioned • Interposer can be made out silicon, glass or laminate. In the case of laminate, we can sometimes find the term 2.1D technology. 8
COMPONENTS AVAILABLE ON A 2.5D INTERPOSER Field Programmable Gate Arrays Memory Cube Logic and System On Chip Memory are the main components integrated on an interposer Graphic Process Unit Central Process Network SERializer-DESerializer Unit Process Unit 9
3DS MEMORY Three-dimensional stacked memory • 3DS is a TSV-based DDR4 DRAM, validated by JEDEC standard • The product is available in 64 and 128 GB, manufactured by Courtesy of SK Hynix Samsung and SK Hynix only Top slave 3DS memory is sold as stand-alone Slave 2 product aimed at server market Slave 1 Master die PCB Courtesy of System Plus Consulting, 3DS 64 Gbits from Samsung ©2016 | www.yole.fr | Status of the CMOS image sensor industry 11
ON-BOARD OPTICAL MODULES • Mid-board and panel optics will integrate with the rack to minimize the distance between FPGA and optical modules, for best-possible signal • Broadcom and Samtec are proposing optical modules: • To minimize the distance between the FPGA and the optical module, and to reduce the power and build-of-materials of the entire chip-to-module link, Altera Corporation and Avago Technologies Inc. (Broadcom) have jointly developed a solution that combines the FPGA and optical transmitter and receiver modules into a single integrated package that can replace multiple external card-edge optical transceivers • Samtec has developed Firefly mid-board optics systems up to 28Gbps MicroPOD optical modules mount to the FPGA package SiPh mid-board optics (> 2020) FireFly from Samtec. SiPh pluggable transceivers (> 2016) source: Samtec ©2016 | www.yole.fr | Silicon Photonics for Data Centers and Other Applications 2016 report 12
FORECAST FOR HIGH PERFORMANCE 3D-BASED PRODUCTS By revenue ($M) 2015-2020 Revenue forecast for 3D TSV high performance products • The high performance (in $M ) TSV application 1200 market by revenue is Total revenue expected to reach 1000 of high ~$1.1B by 2021 Yole Développement October 2016 performance 800 TSV based Revenues (M$) products to • This chart represents 600 reach ~$1.1B revenues made out of by 2021 at a 3D stacked memory 400 CAGR of and interposer 46% 200 0 2015 2016 2017 2018 2019 2020 2021 Year * stacked memory + silicon interposer revenues 13
CONCLUSIONS New commercial products based on 3D were recently launched and will be launched to consolidate the technology portfolio for datacenters and HPC 3DS and HBM memories now available in volume, a supply chain of stacked memory and interposer is built. Samsung recently announced its interposer platform. High-performance products based on TSV technology will generate revenues of 1 billion $ by 2021 Bluechip companies orientate their strategy towards datacenters (Intel, Nvidia,…) Silicon photonics is also moving progressively towards interposer solution 14
CONTACT & SOURCES Biography & contact Emilie JOLIVET – jolivet@yole.fr Emilie Jolivet is a Technology & Market Analyst, in the Advanced Packaging and Semiconductor Manufacturing team, at Yole Développement the "More than Moore" market research and strategy consulting company. She holds a master’s degree Applied Physics specialized in Microelectronics from INSA Toulouse. After an internship in failure analysis in Freescale, she took the position of R&D engineer for 7 years in photovoltaic business and co-authored several scientific articles. Strong for this experience, she graduated from a master in Business Administration at IAE Lyon and then joined EV Group as a business development manager in 3D & Advanced Packaging before joining Yole Développement in 2016. Eric MOUNIER – mounier@yole.fr Dr. Eric Mounier has a PhD in microelectronics from the INPG in Grenoble. He previously worked at CEA LETI R&D lab in Grenoble, France in marketing dept. Since 1998 he is a cofounder of Yole Développement, a market research company based in France. At Yole Développement, Dr. Eric Mounier is in charge of market analysis for MEMS & Sensors, visible and IR imagers (CIS, microbolometers), semiconductors, printed electronics and photonics (e.g. Silicon photonics). He has contributed to more than 200 marketing & technological analysis and 100 reports. Eric is also an expert at the OMNT ("Observatoire des Micro & Nanotechnologies") for Optics. ©2016 | www.yole.fr | Name of the event 15
DATA SOURCES Related reports • Information in this presentation is extracted from the following reports: 16
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