Software development for nanosatellite onboard computers - Dmitriy Kornilin
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Software development for
nanosatellite onboard
computers
Dmitriy Kornilin
2021
ONBOARD COMPUTER (OBC)
I2C
Solar panels Sensors,
Magnetorquer EPS OBC Transceiver Science
units
2
MAIN PROBLEMS
• What tasks has our computer to execute?
• What kind of processor is the most suitable for us?
• What interfaces we need?
• Do we need operating system?
• What language shall we use for programming?
• What data we need to collect and transport to control center?
• How many memory do we need?
Approaches:
• Ready embedded computer
• Mezzanine boards
• User’s specific solution
3
HARDWARE CORES
4
ARM CORES
5
NXP MCUS
LPC2148 ARM7TDMI
LPC1768 CORTEX-M3
LPC1114 CORTEX-M0
LPC4357 CORTEX-M4
6
LPC2142/44/46/48 BLOCK DIAGRAM
RST
Vdd
TRST
Vss
16-32KB 64-512 KB
TMS
TDO
TCK
X1
X2
TDI
SRAM FLASH
System Clock PLL1 System
Test/Debug ETM
PLL2 Functions
USB Clock
SRAM Memory
ARM 7TDMI-S BrownOutDetect
Controller Accelerator VIC PowerOnReset
Local Bus AMBA AHB Bus
D+
AHB to 8 KB SRAM USB 2.0 Full D-
32 kHz shared w/ DMA
Real Time Watchdog VPB Speed Device Up_LED OR
(LPC2148 only) Connect
Vbat
Clock Timer Bridge w/ DMA Vbus
VLSI Peripheral Bus (VPB)
I2C 0/1 SPI Port SSP Port UART0/1 ADC 0/1 DAC Fast I/O Timer0/1 PWM
PWM1 - 6
Tx/RX 0,1
CAP x 8
MAT x 8
6+8 pins
1-10-bit
pins (6)
Modem
46 max
GPIO
SDA
SSEL
SSEL
SCK
MOSI
MOSI
SCL
MISO
MISO
SCK
7
CORTEX MICROCONTROLLERS
8
CORTEX M3
9
CORTEX M3
10BENEFITS OF CORTEX M3 COMPARED TO ARM7
11BENEFITS OF CORTEX M3 COMPARED TO ARM7
12THUMB-2 COMMANDS
Thumb + additional Thumb + 32- bit commands
13ARM7 AND CORTEX M3 PERFOMANCE
14MULTICORE CORTEX M4+M0
15GENERAL SOLUTION
16GENERAL SOLUTION
17NANOMIND A712D
• ARM7 processor - 8-40 MHz
• 2 MB RAM, 4 MB Code storage, 4 MB data flash
• CAN and I2C interfaces
• RTC - real time clock w/backup power keeps
time 30-60 minutes without external power
• FreeRTOS OS and driver library included
• MicroSD socket for up to 2 GB storage
• On-board magnetometer
• 3 PWM bidirectional output 3.3-5 V/±3 A
(Compatible with NanoPower Solar P110U)
• Interface to 6-analog inputs (e.g. sun sensors)
(Compatible with NanoPower Solar P110U)
• SPI interface to e.g. gyroscopes
18IOBC
• Power Consumption: 400mW average
(550 mW max @3.3V)
Interface:
• I2C (master or slave, up to 400 Kbits/s
on fast mode)
• SPI: up to 8 slaves, up to 10 Mbit/s
• UART: 2x RS232 / 1x RS232 + 1x RS485
• ADC: 8 channel, 10-bit
• PWM: 6 channel
• GPIO: up to 27
• 1x USB host
• 1x USB device
• Processor: 400MHz 32-bit ARM9 • Image Sensor Interface for directly
processor interfacing CMOS Image Sensors
• Volatile Memory: 64MB RAM • JTAG for programming
• Data Storage: 2x any size standard SD • Debug port: UART for console user-
cards interface
• Code Storage: 1MB NOR Flash • 4x LEDs (Engineering Model only) to
• FRAM: 256KB support testing and debugging
19NANOMIND Z7000
• Xilinx Zynq 7030 Programmable SoC
• Dual ARM Cortex A9 MPCore up to
800 MHZ
• 1 GB DDR3 RAM and 4 GB storage (32
GB ns option)
• FPGA module – 125k logic cells
20Nanosatellite subsystems - OBC 201b
• Two independent microcontrollers
• Three cores: Cortex M4F, M0, ATxmega
• Operating frequency up to 204 MHz
• Two shared microSD cards up to 32 GB each
• Two independent set of 3-axis
magnetometer, gyroscope and
accelerometer
• RTC with battery back up power
• Three PWM channels for magnetorquers
21SSAU OBC
I2C OBC CAN
Solar panels 3.3 В UART
х6 coils LPC4300 ATxmega UART PC104
I2C Cortex Cortex I2C
AVR SPI bus
I2C M4F M0
10 bit SGPIO 3.3 В
8 inputs ADC/DAC 5В
Debug Magnetometer, UART Debug
Accelerometer, microSD card PDI interface
interface
Gyroscope
Solar panel
Temperature
sensor
I2C
Temperature 6 OBC
sensor
Temperature
sensor
3
22SSAU OBC STRUCTURE
ATxmega Magnetometer,
Accelerometer,
AVR Gyroscope
Magnetometer,
I2C I2C
Accelerometer,
Gyroscope
To
I2C
LPC4300 I2C GPIO
I2C
PC104
Cortex Cortex
M4F M0 I2C GPIO
I2C
I2C I2C
I2C MUX 2
I2C I2C x8
6
23SSAU OBC POWER SUPPLY
To 3,3 V
PC104 5V Power Power Power Power Power
monitor monitor monitor monitor monitor
LPC4300 ATxmega
Cortex Cortex Sensors,
AVR
M4F M0 controlled
switches,
Battery RTC UART UART other
elements
EMC SDRAM
Flash To
PWM QSPI Solar panels
memory
micro SD
To coils Н-brige card
3
24SSAU OBC INTERFACES
25OPERATING SYSTEM
26OPERATING SYSTEM
Operating systems
General purpose operating systems (GPOS) Real-time operating systems (RTOS)
Windows, Unix, Linux, etc. QNX, FreeRTOS, Salvo, uC/OS etc.
Designed to do many things but are not designed Engineered to guarantee:
to offer strict guarantees of: • availability
• availability (how often the system responds to • reliability
requests in a timely manner)
• reliability (how often these responses are
correct)
27OPERATING SYSTEM
Advantages Drawbacks
Developer can use built-in features Code size increases
Less software dependency on Efficiency can decrease
hardware
Multitasking and protection Dependency on OS principles
28SIMPLE KERNEL
Timer
Start
Task 1 enable Set Task 1
Initialization 1 Initialization 2 and timeout? flag
Task 2 Run task
Stage 1 Task 2 enable Set Task 2
flag 2
and timeout? flag
Task 1 Run task Task N Run task
flag 1 flag N Task N enable Set Task N
and timeout? flag
end
29DATA BUDGET
Item Telemetry type Quantity Sampling Word size Required data
rate (Hz) (bits) rate (bps)
EPS voltage 3 0.02 16 0.96
current 3 0.02 8 0.48
OBC status 1 0.02 16 0.32
time 1 4 32 128
ADCS magnetometer 3 4 10 120
accelerometer 3 4 16 192
gyroscope 3 4 16 192
Light sensor, RGBW 4x6 4 8 768
PCM Data Rate 1 401.76
Data per one revolution (5400 sec) = 7569504 bits ≈ 1 Mb
@ 1200 bit/s, 420 sec window ≈ 15 passes
30NYQUIST–SHANNON SAMPLING THEOREM
31DATA STORAGE
Stack Queue
32FILE SYSTEM
File Allocation Table (FAT)
Application
File System Module
Low level disk I/O layer
Media
Journaling File System (JFS)
33STORAGE TYPES
34COMMAND STRUCTURE
Header Payload
Request: CRC
Packet ID Command Data
Header Payload
Response: CRC
Packet ID Response ID Data
• Reboot • Format flash drive
• Get status • I2C direct read/write
• Get N bytes with M step from file F • OBC control and status
• Get N bytes starts from byte S from file
F with file step M
• Delete file
• Free memory space
35CMSIS
Cortex Microcontroller Software Interface Standard
Aims:
- improving code reusage (portability) on other Cortex
microcontrollers
- offers the possibility of using standard code by third party
software developing firms
- shorten time of code development
- using of different compilers
- Compatibility of code obtained from different sources
36CMSIS COVERAGE
Cortex Microcontroller Software Interface Standard
- unified registers names (NVIC, SYSTICK, MPU)
- unified exception names
- unified structure of header files
- unified system initialization process (SystemInit(); )
- standard intstrinc functions
- common functions for data exchange (UART, SPI, Ethernet)
- unified method of system clock frequency determination
(global variable SystemFrequency)
37CMSIS STRUCTURE
38CMSIS FILES
39CMSIS EXAMPLE
40По желанию – личные контактные
данные автора,
телефон,
e-mailYou can also read
