Introduction to PSP MOSFET Model (Invited)
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Introduction to PSP MOSFET Model (Invited) G. Gildenblat, X. Li, H. Wang, W. Wu Department of Electrical Engineering The Pennsylvania State University, University Park, USA and R. van Langevelde, A.J. Scholten, G.D.J. Smit and D.B.M. Klaassen Philips Research Laboratories, Prof. Holstlaan 4 (WAY41), 5656 AA Eindhoven, The Netherlands ABSTRACT PSP is the latest and the most advanced compact MOSFET model developed by merging the best features of the two surface potential-based models: SP (devel- oped at The Pennsylvania State University) and MM11 (developed by Philips Research). This work presents the main ideas enabling the development of PSP, model structure and its general features. Comparison with ex- perimental data and simulation examples are included as well. Keywords: compact model, MOSFET, surface poten- tial 1 INTRODUCTION There is presently a wide consensus in the compact modeling community that traditional threshold-voltage- Figure 1: Origin of PSP based models of MOS transistors have reached the limit of their usefulness and need to be replaced with the more mulation (”symmetric linearization” method [5, 6]) and advanced surface-potential- based or inversion charge- the introduction of small-geometry effects. based models (we use model classification suggested in The implementation of these advances and the over- [1]). The development of compact MOSFET models all model structures of SP [1] and MM11 [2] turned out at Philips [2, 3] and at The Pennsylvania State Univer- to be compatible, enabling the merger of both models sity [1, 4–6] has followed the surface-potential-based ap- into a single new model called PSP (Fig. 1) that com- proach in order to provide the physics-based modeling bines the best features of SP and MM11. This paper of all regions of operation and not to make additional provides an overview of PSP. approximations beyond those that are already inher- ent in the charge-sheet models. Indeed, while the con- 2 GENERAL FEATURES OF PSP stitutive equation of the inversion-charge-based mod- els can be derived differently, in the final analysis it The model structure shown in Fig. 2 consists of the follows from the equation for the surface potential in core and enhancement blocks. The core block contains which the accumulation region is neglected and the bulk the quasi-static (QS) intrinsic and the extrinsic models. charge is eliminated using an additional approximation The intrinsic model contains expressions for the drain [1]. Another motivation for the selection of the surface- current, terminal charges and the noise sources. The ex- potential-based approach is that it enables the physical trinsic model includes contributions of the source-drain modeling of the source-drain overlap regions where the overlap regions, gate and substrate currents, etc. The inversion charge is not a particularly suitable variable. enhancement block contains junction model developed The surface-potential-based approach to modeling using [10] as a starting point and the NQS module [6,11]. MOS transistors dates back to the Pao-Sah [7]. The Both MM11 and SP distinguish between local and modern surface-potential-based models are based on the global model parameters. This approach is carried over charge-sheet model (CSM) of Brews [8]. Despite the to PSP. Global parameters include geometry dependences clear physics and the ability to provide a single expres- and before evaluating MOSFET output characteristics sion for all regions of operation [9] surface-potential- are converted into a small number (about 35) of local based models did not become popular until the last parameters actually used in the core model. One pos- decade due, in part, to their perceived complexity. Suc- sible approach to the model parameter extraction is to cessful surface-potential-based models became possible extract the local parameters (”miniset”) for each device only after significant progress was made in the tech- geometry and then to use scaling equations to obtain the niques for the computing the surface potential, simplifi- global parameters (”maxiset”) for the relevant range of cation of the charge equations relative to the original for- geometries. The actual local parameters used in circuit
simulations are then recomputed from the global para- meters. The major features of PSP include the following. • Physical surface-potential-based formulation in both intrinsic and extrinsic model modules • Physical and accurate description of the accumu- lation region • Inclusion of all relevant small geometry effects • Modeling of the halo implant effects, including the output conductance degradation in long devices • Coulomb scattering and non-universality in the mobility model • Non-singular velocity-field relation enabling the modeling of RF distortions including intermodu- lation effects (IM3) • Complete Gummel symmetry • Mid-point bias linearization enabling accurate mod- Figure 2: Structure of PSP Model eling of the ratio-based circuits (e.g. R2R circuits) • Quantum-mechanical corrections where Ec denotes the critical field and Ey is the lateral • Correction for the polysilicon depletion effects component of the electric field. In terms of the drain • GIDL/GISL model current this leads to an expression • Surface-potential-based noise model including chan- 2µ (W /L) qef f ∆ψ nel thermal noise, flicker noise and channel-induced Id = q (3) gate noise. 2 1 + 1 + 2 (∆ψ/Ec L) • Advanced junction model including trap-assisted tunneling, band-to-band tunneling and avalanche where ∆ψ is the surface potential difference across the breakdown channel and qef f is the effective inversion charge density • Spline-collocation-based NQS model including all modified to account for the diffusion current component. terminal currents Similar expressions are adopted for p-channel devices • Stress model with suitable modifications to account for the difference in the shape of the velocity-field relation for holes and 3 MOBILITY electrons in silicon. These expressions are non-singular enabling, for example, the modeling of passive RF mix- The mobility expression used in PSP is given by ers first accomplished in SP using a somewhat different approach [14]. As shown in [15] they also enable accu- MU0 · µx µ= 2 (1) rate modeling of RF distortions in the saturation region. THEMU CS·qbm 1 + (MUE · Eef f ) + (qbm +qim )2 +ρ 5 LATERAL FIELD GRADIENT where MU0 is the low-field mobility, parameters MUE FACTOR and THEMU account for the mobility degradation by the effective vertical field, Eef f , Coulomb scattering is To extend the model formulation beyond the gra- introduced as in [12] using the parameter CS, qbm is dient channel approximation PSP relies on the lateral the bulk charge per unit channel area at the surface gradient factor introduced in [16]: potential midpoint [1], qim is the density of the inversion f = 1 − (εs /qNsub ) ∂ 2 ψs ∂y 2 charge also at the potential midpoint and the factor µx (4) describes the non-universality effects and also accounts where εs is the absolute dielectric constant of silicon and (empirically) for the doping non-uniformity. The factor Nsub denotes the substrate doping. The initial applica- ρ accounts for the series resistance and is set to zero tion of this method of modeling short-channel effects when the latter is included externally. used the approximation f = f (L, W ) [17], but in PSP as in SP [1] we use a bias-dependent approximation for 4 VELOCITY SATURATION f . The expression for f in PSP is modified relative to SP to account for the experience gained in using the lateral Velocity saturation is critical not only for the ac- gradient factor for the purpose of compact modeling. curate modeling of the saturation region but also to in- sure the nonsingular behavior of the model at zero drain bias [13,14]. The saturation velocity model used in PSP 6 SYMMETRIC LINEARIZATION is that of MM11 [2]. For n-channel devices The key to the merger of SP and MM11 is inclusion µEy of expressions (2) and (3) within the context of sym- Vd = q (2) metric linearization. The initial version of this tech- 2 1 + (Ey /Ec ) nique was developed for long-channel devices to verify
the concept, but its implementation in SP includes ve- locity saturation described via the Grotjohn-Hofflinger method [18, 19]. The explicit form of the surface posi- 150 tion dependence in the symmetric linearization method is given by ID (µA) " # 100 r 2∆ψ ψ(y) = ψm + H 1 − 1 − (y − ym ) (5) HL where the coordinate y is measured from the source to- wards the drain end of the channel, ψm is the average 50 surface potential in the channel, and ym denotes the coordinate of the surface potential midpoint (a point where the surface potential ψ equals ψm ): 0 L ∆ψ 0.0 0.2 0.4 0.6 0.8 1.0 ym = 1+ (6) 2 4H VDS (V) To clarify the exposition of major concepts (5), all subsequent equations are written without the channel Figure 3: Output characteristics of 0.36/0.09µm MOS- length modulation factor. The complete set of PSP FET; Vgs varies between 0.5 and 1V, Vsb =0. Circles equations will be presented elsewhere. In the long-channel represent measured data, solid lines correspond to PSP version of the symmetric linearization method [5] normalized drain charge given in the Ward-Dutton par- H0 = (qim /α) + φt (7) tition [20] by the integral where φt = kT /q is the thermal potential, qim is the ZL 1 y inversion charge density at the potential midpoint and QD = qi dy (14) α denotes the linearization coefficient in the expression L L 0 [1, 5] qi = qim − α(ψs − ψm ) (8) becomes for the inversion charge density. The relation between ∆ψ 2 qim α∆ψ ∆ψ qim and qef f is as follows QD = + 1− − (15) 2 12 2HP SP 20HP2 SP qef f = qim + αφt (9) The expressions for the current and terminal charges The flexibility of the symmetric linearization method obtained in this manner are continuous and smooth in is such that eqs. (5), (6) remain unchanged when the all regions of operation from accumulation to deep inver- velocity saturation is included, the only difference being sion. The linearization scheme adopted in PSP (as well the change in the expression for H [1]: as those in SP and MM11) enables accurate modeling of ratio-based circuits. A detailed discussion including −1 HSP = H0 (1 + δ0 ∆ψ/Ec L) (10) applications to R2R circuits can be found in [21]. where δ0 is a bias-dependent variable introduced to ac- 7 EXPERIMENTAL VERIFICATION count for the details of the velocity-field relation [18] and to remove the singularity at Vds = 0 [14]. Comparison of PSP with experimental data was per- This approach is carried over to PSP where the posi- formed using data from the 90nm CMOS technology tion dependence of the surface potential is still given by node. The results presented below are for a 0.36µm/ (5) but in order to accommodate the different expres- 90nm device. Due to space limitations global PSP fits sion for the drift velocity and the drain current, instead will be presented elsewhere. As shown in Figs. 3-5 an of (10) we set excellent fit of the device characteristics is obtained in HPSP = qef f /α′ h (11) all regions of operation. The inclusion of short-channel and narrow-channel where effects in PSP is sufficiently flexible to allow an accurate " 2 # 1 ∆ψ α′ = α 1 + (12) description of the device output conductance including 2 hEc L the case of low gate drive (cf. Fig. 5). The physical na- and ture of PSP is responsible for the excellent reproduction " 2 # 12 of the gm /Id characteristics shown in Fig. 6 and impor- 1 1 ∆ψ h= + 1+2 (13) tant for analog and mixed applications of the model. 2 2 Ec L The availability of the surface potential both in the With this in mind the quasi-static terminal charges active and the source/drain overlap regions of the device can be evaluated as in [1, 5], and [6] with the only dif- enables the use of the surface-potential-based gate cur- ference being that now H = HP SP . For example, the rent model developed in [22, 23] and adapted to PSP by
−5 102 10 10−6 10−7 gm /ID (1/V) ID (A) 10−8 101 10−9 10−10 10−11 10−12 0.0 0.2 0.4 0.6 0.8 1.0 100 VGS (V) 10−9 10−8 10−7 10−6 10−5 10−4 ID (A) Figure 4: MOSFET transfer characteristics; Vds =25mV, Vsb =0, 0.2...1.0V Figure 6: gm /Id characteristics; Vds =1V, Vsb =0V, Vgs varies continously between 0 and 1V, Vsb =0, 0.2...1.0V 10−9 10−10 gDS (A/V) 10−4 IG (A) 10−11 10−12 10−5 0.0 0.2 0.4 0.6 0.8 1.0 VDS (V) 10−13 −1.0 −0.5 0.0 0.5 1.0 VGS (V) Figure 5: Output conductance; Vgs varies between 0.5 and 1V, Vsb =0 Figure 7: Gate tunneling current; Vsb =0V, Vds =0.025, changing parameter H in the channel region as described 0.042, 0.61 and 1V in the previous section. Comparison with experimental use of the improved Klaassen-Prins approach introduced data is presented in Fig. 7 and indicates the high degree in [27], where fluctuations in the velocity saturation of accuracy. The same technique is used to model the term are also taken into account. Using the symmetric contributions of the overlap regions to the capacitance- linearization scheme, the improved approach is devel- voltage characteristics [24, 25]. Typical CV curves are oped in the ψs -framework. The resulting noise model shown in Fig. 8, 9. has been verified down to the 90nm CMOS technology node, see Fig. 10. The model is in good agreement with 8 NOISE MODEL measurement data without using any additional noise PSP includes 1/f noise, channel thermal noise and parameters. induced gate noise. The PSP flicker noise model is ob- tained by developing a surface-potential-based version 9 NON-QUASI-STATIC MODEL of the general model in [26], which combines both car- rier numbers and mobility fluctuations. This formula- The modeling of fast transients and high-frequency tion improves an earlier version of the surface-potential- small-signal characteristics of the MOSFET often re- based adaption of [26] given in [2, 25]. For the channel quires an NQS model of the device. Of the several thermal noise and the induced gate noise, PSP makes NQS techniques available at the present time, two al-
1.2 10−19 f = 10GHz; VDS = 1V −20 10 Sid Sig , Sid (A2 /Hz) 0.9 10−21 CGG (pF) 0.6 10−22 Sig −23 10 0.3 10−24 10−25 0.2 0.4 0.6 0.8 1.0 −1.2 −0.6 0.0 0.6 1.2 VGS (V) VGS (V) Figure 10: Drain (Sid ) and gate (Sig ) current noise spec- tral density versus gate-source bias for an L=90nm n- Figure 8: Measured (symbols) and modelled (lines) in- channel device. Symbols denote measurements and lines put capacitance Cgg as a function of gate bias Vgs for represent modelled results using PSP W/L=800µm/90nm n-channel MOSFET; Vds =0, Vsb =0 2.5 0.6 Drain Current (mA) No SCE 2.0 1.5 0.4 1.0 CBG (pF) SCE Included 0.5 0.0 NQS 0.2 -0.5 QS -1.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 Time (ns) −1.2 −0.6 0.0 0.6 1.2 Figure 11: Transient response of 5/5µm MOSFET with VGS (V) and without short-channel effect (SCE). The gate volt- age is ramped from 0 to 3V in 0.5ns. Figure 9: Measured (symbols) and modelled (lines) transcapacitance Cbg as a function of gate bias Vgs for accumulation region [11]. W/L=800µm/90nm n-channel MOSFET; Vds =0, Vsb =0 The NQS model developed for PSP includes model- low an arbitrary trade-off between the model accuracy ing of short-channel effects. Typical results are shown and complexity: the channel segmentation method [26] in Fig. 11. The upper set of curves represents the case and the spline-collocation technique [6, 11]. The latter of constant mobility, while the lower set shows the sim- is based on converting the partial differential equation ulation results when the mobility is degraded by the expressing current continuity into a system of coupled vertical field. In addition to the overall reduction of the ordinary differential equations (with the number equal current, mobility degradation lengthens the transients. to the number of collocation points) that can be readily An important advantage of basing the NQS model solved by the circuit simulator. The use of the spline on the solution of the continuity equation is that all ter- approximation for the charge density in the device is es- minal currents are automatically included and the large- sential since the earlier polynomial approximations did signal and small-signal models are consistent with each not allow use of more than one collocation point. The other and with quasi-static simulations, which appear details of this approach can be found in [6]. More re- as a proper limiting case of slow transients or in the cently this technique was extended to include all regions low-frequency limit. This is also true for the channel of operation in order to model transients involving the segmentation method.
0 REFERENCES =1 [1] G. Gildenblat, H. Wang, T.-L. Chen, X. Gu and X. ntal slope Fundame Cai, IEEE JSSC, 39, 1394 (2004) −50 [2] R. van Langevelde, A.J. Scholten and D.B.M. =2 slope VOUT (dBm) nic Klaassen, http://www.semiconductors.philips.com nd Harmo /acrobat/other/philipsmodels/mos-models/ 2 −100 3 lope= model11/NLUR2002-802.pdf o n ic s [3] R. van Langevelde, A.J. Scholten and D.B.M. m rd Har Klaassen, Proc. NSTI-Nanotech 2004, p. 60 3 −150 [4] G. Gildenblat, C. McAndrew, H. Wang, W. Wu, D. Foty, L. Lemaitre and P. Bendix, Proc. ICECS 2004 (in press) −200 [5] T.-L. Chen and G. Gildenblat, Electron. Lett., 37, −40 −35 −30 −25 −20 −15 −10 791 (2001) VRF (dBm) [6] H. Wang, T.-L. Chen and G. Gildenblat, IEEE TED, 50, 2262 (2003) Figure 12: Intermodulation products for a simple RF [7] H.C. Pao and C.T. Sah, SSE, 9, 927 (1966) CMOS mixer [8] J.R. Brews, SSE, 21, 345 (1978) [9] Y. Tsividis, ”The MOS Transistor”, McGraw-Hill, 10 SIMULATION EXAMPLE 1999 [10] G.A.M. Hurkx, D.B.M. Klaassen and M.P.G. Knu- As an example of circuit simulation using PSP we vers, IEEE TED, 39, 331 (1992) consider intermodulation (IM3) modeling of a simple [11] H. Wang and G. Gildenblat, Proc. 2004 IEEE CICC passive mixer. Modeling of this circuit (that is of some p. 5 interest to mobile communications) is a surprisingly dif- [12] C.-L. Huang and N. Arora, SSE, 37, 97 (1994) ficult problem that has been solved only recently [14]. [13] K. Joardar, K.K. Gullapalli, C.C. McAndrew, M.E. The issue is that (unlike the case for active mixers) pas- Burnham and A.Wild, IEEE TED, 45, 134 (1998) sive mixer modeling is sensitive to any singularity at [14] P. Bendix, P. Rakers, P. Wagh, L. Lemaitre, W. zero drain bias. The non-singular nature of PSP results Grabinski, C.C McAndrew, X. Gu and G. Gilden- in a correct slope (3 dB/dB) for the third harmonic (cf. blat, Proc. 2004 IEEE CICC p. 9 Fig. 12). The circuit diagram and further details (some [15] R. van Langevelde, L.F. Tiemeijer, R.J. Havens, within the SP context) can be found in [14]. M.J. Knitel, R.F.M. Roes, P.H. Woerlee and D.B.M. Klaassen, IEDM 2004 Tech. Dig., p. 807 [16] T.N. Nguyen and J.D. Plummer, IEDM Tech. Dig., 11 CONCLUSIONS 1981, p. 596 [17] M. Miura-Mattausch, IEEE TCAD, 13, 610 (1994) The commonality between SP and MM11 have been [18] T. Grotjohn and B. Hoefflinger, IEEE TED, 31, 109 used to successfully merge both compact models into (1984) a powerful new model called PSP. This development [19] N. Arora, R. Rios, C.-L. Huang and K. Raol, IEEE required the expansion of the symmetric linearization TED, 41, 988 (1994) method which has been shown to be sufficiently flexible [20] D.E. Ward and R.W. Dutton, IEEE JSSC, 13, 703 for use outside of its original domain. The model has (1978) been subjected to the standard convergence tests and [21] D.B.M. Klaassen, R. van Langevelde and A.J. verified by comparison with data obtained from several Scholten, IEICE Trans. Electron., p. 854 (2004) 90nm and 60nm node processes. PSP satisfies all the [22] R. van Langevelde, A.J. Scholten, R. Duffy, F.N. requirements for a next generation compact MOSFET Cubaynes, M.J. Knitel and D.B.M. Klaassen, model. IEDM 2001 Tech. Dig., p. 289 [23] X. Gu, T.-L. Chen, G. Gildenblat, G.O. Workman, S. Veeraraghavan, S. Shapira and K. Stiles, IEEE Acknowledgments TED, 51, 127 (2004) [24] R. van Langevelde, A.J. Scholten, R.J. Havens, L.F. PSP development at the PSU is supported in part Tiemeijer and D.B.M. Klaassen, Proc. ESSDERC by the Semiconductor Research Corporation, the Mo- 2001, p. 81 torola Shared University Partnership Program and by [25] G. Gildenblat, X. Cai, T.-L. Chen, X. Gu and H. the IBM University Partnership Award. The authors Wang, IEDM 2003 Tech. Dig., p. 863 are grateful to C. McAndrew, J. Watson, P. Bendix, D. [26] K.K. Hung, P.K. Ko, C. Hu and Y.C. Cheng, IEEE Foty, N. Arora, W. Grabinski, and S. Veeraraghavan for TED, 37, 654 (1990) several illuminating discussions of the compact model- [27] R. van Langevelde, J.C.J. Paasschens, A.J. ing methods, and to B. Mulvaney for the use of MICA Scholten, R.J. Havens, L.F. Tiemeijer and D.B.M. simulator. Klaassen, IEDM 2003 Tech. Dig., p. 867.
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