IEEE International Symposium - (ISCAS 2021) on Circuits and Systems
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IEEE International Symposium
on Circuits and Systems
(ISCAS 2021)
May 22-28, 2021 (Virtual)
May 23-26, 2021 (On-site & Virtual)
Hotel Inter-Burgo Daegu, Korea & Virtual Platform
On-site Conference Program Book
Welcome Message – General Co-Chairs
Jinwook Burm JinGyun Chung Myung Hoon Sunwoo
Sogang University Jeonbuk National University Ajou University
(Korea) (Korea) (Korea)
On behalf of the Organizing Committee, it is a sincere honor and pleasure to welcome you to Daegu and
the fifty third IEEE International Symposium on Circuits and Systems (IEEE ISCAS 2021). Since its foundation
in 1968 and through some fifty years of history, ISCAS has been the premiere flagship conference with the
aim of offering networking and interaction for researchers in the highly active fields of theory, design and
implementation of circuits and systems.
For the first time in its history, ISCAS 2021 will be held in a hybrid format offering the best to the CAS
community during the pandemic era. The venue of ISCAS 2021 will be both the virtual platform, CONFlux,
and Hotel Inter-Burgo in Daegu, Korea. ISCAS 2021 in Daegu is especially meaningful, since Korea has
become one of the leader of IT industry with its leading technologies and Daegu, the birth place of Korean
IT industry and a city of living legacy and charm embracing 3,000 years of history, is in the center of all the
dynamic transitions. We hope you can find yourself truly enjoyable during ISCAS 2021.
ISCAS 2021 will be driven by the theme “Smart Technology for an Intelligent Society” aiming to emphasize
the potential of the CAS Society to find multidisciplinary solutions for the societal and engineering
challenges of our times. ISCAS 2021, with its globally significant theme, has attracted nearly 1,400 paper
submissions, both from academia and industries all over the world.
Along with the wide selection of contributed papers, we are pleased to announce five distinguished
keynote speakers. On Monday, the former Taiwan Minister of Science and Technology, Liang Gee-Chen
and Min-Goo Kim, the Executive Vice President from System LSI Business, Samsung Electronics, will each
speak on “Circuits and Systems drive semiconductor moving” and “How will the evolution of personalized
portable systems affect the smart society?” respectively. On Tuesday, Dr. Kyoung Park, Researcher at SK
2 | ISCAS 2021
Hynix will give a talk on “Memory & Storage Challenges for Data-centric cloud” and Prof. Giacomo Indiveri,
the director of the Institute of Neuroinformatics (INI) of the University of Zurich and ETH Zurich will speak
on “Neuromorphic Intelligence: brain-inspired processing technologies for extreme-edge use cases”. On
Wednesday, Prof. Vivienne Sze, from the Department of Electrical Engineering and Computer Science at
MIT will give a talk of “Efficient Computing for AI and Robotics: From Hardware Accelerators to Algorithm
Design”. There are also overview lectures, tutorials, special sessions and satellite events including AutoCAS
(Automobile Circuits and Systems), WiCAS/YP and FoodCAS. Through these diverse forms of technical
activities, satellite workshop and events, we hope you will find ISCAS 2021 both rewarding and exciting.
We wish to genuinely thank the Technical Program Co-Chairs’ leadership, chaired by professors, Hanho Lee,
KyungKi Kim, Takao Onoye and Gabriel Rincón-Mora, for being the backbone of technical content of the
conference that best supports the conference theme.
ISCAS 2021 has been a genuine team work. We are deeply indebted to authors for their outstanding
contributions and the CASS Board of Governors, the Executive Committee, and the ISCAS Steering
Committee for their support and trust, without which organizing this symposium would have been a
daunting task. We also express our special thanks to the local and international OC’s for their infinite
devotion to make ISCAS 2021 rewarding. Finally, we would like to also express our special thanks to
IEEE, IEEE CAS, Korea Tourism Organization, Daegu Convention & Visitors Bureau and many contributing
institutions for their most generous supports for ISCAS 2021.
Thank you.
Jinwook Burm, Jingyun Chung, and Myung Hoon Sunwoo
IEEE International Symposium on Circuits and Systems | 3
Welcome Message – Technical Program Co-Chairs
Hanho Lee KyungKi Kim Takao Onoye Gabriel Rincón-Mora
Inha University Daegu University Osaka University Georgia Institute of
(Korea) (Korea) (Japan) Technology
(USA)
On behalf of the Technical Program Committee of the 2021 IEEE International Symposium on Circuits
and Systems (ISCAS 2021), it is a great honor and privilege for us to welcome you to Daegu, located at
the southeast of Korea and also the wonderful city with many historic legacies registered as the World
Heritage sites by UNESCO.
ISCAS 2021 Program has been re-organized into a hybrid format (both virtual and on-site) over a 7-day
schedule, for the first time of the ISCAS history. The technical program this year consists of keynote
lectures, overview lectures, tutorials, the traditional mix of regular lecture and poster sessions, special
sessions, live demonstrations, and a student design competition, complemented by mini-tutorials. Live
sessions will be available as usual, but authors have also been cordially asked to provide a pre-recorded
presentation of their works with aim of encouraging the audience and attendees from all time zones to
participate. Virtual breakout rooms will also be available to foster technical discussion.
Its regular technical program covers the traditional areas of interest of the Circuits and Systems (CAS)
Society that have been organized in 13 tracks that mostly coincide with the Technical Committees of the
IEEE CAS Society. The Technical Program Committee received 1,300 paper submissions from 56 countries
for all tracks, including the special and live-demo sessions, from which 772 high quality papers were
accepted. This corresponds to an acceptance rate of 59.38%, which is in line with the ISCAS tradition of
quality. In addition to the regular program, we have 20 special sessions on a variety of cutting-edge CAS
topics. 4,986 independent reviews were submitted this year, giving an average of above 3.9 reviews for
each of the papers contributed to regular tracks and special sessions.
The ISCAS 2021 technical committee put particular efforts in organizing state-of-art tutorials. This year,
4 | ISCAS 2021
we have 1 full-day tutorial and 9 half-day tutorials offered by leading experts and pioneers from academia
and industry in the field of circuits and systems. Regular full-day and half-day tutorials are scheduled on
May 22, Saturday and May 23, Sunday, while mini tutorials are on May 25, Tuesday, May 26, Wednesday
and May 27, Thursday. Furthermore, continuing the tradition on keynote lectures, ISCAS 2021 features
interesting keynote presentations from worldwide renowned experts, being Prof. Liang Gee-Chen (former
Taiwan Minister of Science and Technology), Vice President Min-Goo Kim (System LSI Business, Samsung
Electronics), Dr. Kyoung Park (Researcher, SK Hynix), Prof. Giacomo Indiveri (University of Zurich and ETH
Zurich) and Prof. Vivienne Sze (MIT).
In addition to these plenary keynotes, overview lectures by representative members of the CAS
community are programmed from May 26, Wednesday to May 28, Friday. They cover a variety of innovative
research streams, therefore, please check the schedule to find those which stimulates your scientific and
technical interests.
We would like to express our thanks to the people who have contributed to the high quality of the
technical program. Special thanks go to the 38 Track Chairs and Co-Chairs of the 16 Tracks, the 332 Review
Committee Members(RCMs), 1,892 reviewers.
We would like also thank our gratitude to the Special Session Chairs, Prof. Kyeong-Sik Min, Prof. Elena
Blokhina, Prof. Ittetsu Taniguchi, Prof. Lan-Da Van, Prof. Qiang Li, Prof. Ross M. Walker and Prof. Minkyu Je,
who put considerable effort to coordinate the entire review process for the special session papers. We
also thank Tutorial Co-Chairs, Prof. Jongsun Park, Prof. Massimo Alioto, Prof. Andy Wu, Prof. Samuel Tang
(Kea-Tiong Tang), Prof. Hiroo Sekiya and Prof. Timothy Constandinou for putting together an exciting set
of topics and speakers, and are also thankful to the Plenary Chairs, Prof. Deog-Kyoon Jeong, Prof. Boris
Murmann, Prof. Robert Chen-Hao Chang and Master Junjin Kong for making possible our five high profile
keynote presentations.
The entire review process was carried out using a professional on-line, web-based review system, which
has been necessary in achieving the high quality and timely reviews, and for this we thank Tom Wehner,
who has in addition been greatly helpful every time we needed his assistance. Finally, we would like to
thank the authors for their effort in submitting excellent contributions that have resulted in a high quality
and exciting technical program.
We are strongly convinced that ISCAS 2021 will provide you the best place to present your results and
share your ideas. We sincerely wish you a technically solid and exciting conference in Daegu.
Hanho Lee , KyungKi Kim, Takao Onoye and Gabriel Rincón-Mora
IEEE International Symposium on Circuits and Systems | 5
Conference Committee
· Seong-Hwan Cho, KAIST, Korea
General Co-Chairs · Jaehyouk Choi, KAIST, Korea
· Jinwook Burm, Sogang University, Korea · Taewook Kim, Yonsei University, Korea
· JinGyun Chung, Jeonbuk National University, Korea
· Myung Hoon Sunwoo, Ajou University, Korea
Plenary Session Co-Chairs
· Deog-Kyoon Jeong, Seoul National University, Korea
Technical Program Co-Chairs · Boris Murmann, Stanford University, USA
· Hanho Lee, Inha University, Korea · Robert Chen-Hao Chang, National Chung Hsing
· KyungKi Kim, Daegu University, Korea University, Taiwan
· Takao Onoye, Osaka University, Japan · JunJin Kong, Samsung Electronics, Korea
· Gabriel Rincón-Mora, Georgia Institute of
Technology, USA
Publicity Co-Chairs
· Hadi Heidari, University of Glasgow, UK
Special Session Co-Chairs · Guoxing Wang, Shanghai Jiao Tong University, China
· Kyeong-Sik Min, Kookmin University, Korea · Yoshifumi Nishio, Tokushima University, Japan
· Elena Blokhina, Univ. College Dublin, Ireland · Jose Silva-Martinez, Texas A&M University, USA
· Ittetsu Taniguchi, Osaka University, Japan · Chulwoo Kim, Korea University, Korea
· Lan-Da Van, National Chiao Tung University, Taiwan · Suhwan Kim, Seoul National University, Korea
· Qiang Li, University of Electronic Science & · Seok-Bum Ko, University of Saskatchewan, Canada
Technology of China, China · Hyungtak Kim, Hongik University, Korea
· Ross M. Walker, University of Utah, USA · Byeong-Ho Choi, Korea Electronics Technology
· Minkyu Je, KAIST, Korea Institute (KETI), Korea
Tutorial Co-Chairs Publication Co-Chairs
· Jongsun Park, Korea University, Korea · Sungchung Park, Konkuk University, Korea
· Massimo Alioto, Natioal University of Singapore, · Jung-Hwan Han, Chungnam National University,
Singapore Korea
· Andy Wu, National Taiwan University, Taiwan
· Samuel Tang (Kea-Tiong Tang), National Tsing Hua
University, Taiwan
Finance Co-Chairs
· Hiroo Sekiya, Chiba University, Japan
· T imothy Constandinou, Imperial College of London, UK · Yunsik Lee, UNIST, Korea
· Kyubok Lee, KETI, Korea
· Hyuk-Jae Lee, Seoul National University, Korea
· Sung Weon Kang, ETRI, Korea
Demo Sessions Co-Chairs
· Ji-Hoon Kim, Ewha Womans University, Korea
· Tobi Delbruck, ETH Zurich, Switzerland
6 | ISCAS 2021
· Kuduck Kwon, Kangwon National University, Korea
Industry & Exhibition Co-Chairs · Hoyoung Yoo, Chungnam National University, Korea
· Gwo-Giun (Chris) Lee, National Cheng Kung Univer- · Yue Liu, ISEP, French
sity, Taiwan
· Rajiv
Joshi, IBM, USA
· Jongsun
Kim, Hongik University, Korea
Overview Lecture Co-Chairs
· Kuktae
Hong, LG Electronics, Korea
· Kwangjune
Sohn, sk hynix, Korea · Jeongjin Roh, Hanyang University, Korea
· Chuan Zhang, Southeast University China, China
· Kwang-Hyun Baek, Chung-Ang University, Korea
Registration Co-Chairs
· Kang-Yoon Lee, SungKyunKwan University, Korea
Industrial Board
· Youngjoo Lee, POSTECH, Korea
Youm Huh, Silicon Mitus, Korea
John Yong-In Park, Samsung Electronics, Korea
Seung-Jong Choi, LG Electronics, Korea
Local Co-Chairs
Yoon-Jong Lee, DB HiTek, Korea
· Jaeha Kung, DGIST, Korea Kyoung Park, sk hynix, Korea
·B yungin Moon, Kyungpook National University, Korea
· Junrim Choi, Kyungpook National University, Korea
· Jae Joon Kim, UNIST, Korea
International Advisory Co-Chairs
· Amara Amara, MINARC Laboratory, French
· Franco Maloberti, Univeristy of Pavia, Italy
WiCAS/DIC Co-Chairs · Manuel Delgado-Restituto, CSIC, Spain
· Yoko Uwate, Tokushima University, Japan · Andrei Vladimirescu, ISEP, French
· Xinmiao Zhang, Ohio State University, USA · Sung-Mo Kang, University of California, Korea
· SoYoung Kim, SungKyunKwan University, Korea · Mohamad Sawan, Polystim Neurotech Laboratory,
· Soo Youn Kim, Dongguk University, Korea Canada
· Soojung Ryu, Seoul National University, Korea · Yong Lian, National University of Singapore, Singa-
pore
YP Co-Chairs
Treasurer
· Chan Ho Lee, Soongsil University School, Korea
· Joo-Young Kim, KAIST, Korea · Youngmin Kim, Hongik University, Korea
· Won-Young Lee, Seoul National University of Sci-
ence & Technology, Korea
Management Co-Chairs
· Suk-Ju Kang, Sogang University, Korea
Web/Social Media Co-Chairs · Seokhyeong Kang, POSTECH, Korea
· Hyung-Min Lee, Korea University, Korea
IEEE International Symposium on Circuits and Systems | 7
On-site Daily Program
05-23 (Sunday)
18:00-20:00 YP Mentoring Reception Convention Hall A
05-24 (Monday)
08:30-09:00 Opening Ceremony Convention Hall B
Keynote 1
09:00-10:00 Convention Hall B
Liang-Gee Chen, National Taiwan University
Room 1 – 10
10:00-11:40 Oral Sessions / Live Demo 1
(Inter Village, Park Village)
11:40-12:00 Breakout
Room 1 – 10
12:00-13:00 Poster Sessions
(Inter Village, Park Village)
13:00-15:00 Lunch & WiCAS Conventional Hall A
Keynote 2
15:00-16:00 Convention Hall B
Min-Goo Kim, Samsung Electronics
Room 1 – 10
16:00-17:40 Oral Sessions
(Inter Village, Park Village)
17:40-18:00 Breakout
18:00-20:00 Awards Ceremony Convention Hall B
09:00-18:00 Exhibitions
05-25 (Tuesday)
Keynote 3
09:00-10:00 Convention Hall B
Giacomo Indiveri, University of Zurich and ETH Zurich
Room 1 – 10
10:00-11:40 Oral Sessions
(Inter Village, Park Village)
11:40-12:00 Breakout
Room 1 – 10
12:00-13:00 Poster Sessions
(Inter Village, Park Village)
13:00-15:00 Lunch & YP Convention Hall B
Keynote 4
15:00-16:00 Convention Hall B
Kyoung Park, VP, Memory System Research, SK Hynix
Room 1 – 10
16:00-17:40 Oral Sessions
(Inter Village, Park Village)
Room 1 – 10
17:40-18:40 Poster Sessions / Live Demo 2
(Inter Village, Park Village)
09:45-17:00 AutoCAS Convention Hall C
09:00-18:00 Exhibitions
8 | ISCAS 2021
Keynote 1
05-24 (Monday) 09:00-10:00 l Convention Hall B
Circuits and Systems Drive Semiconductor
Moving
Liang-Gee Chen
National Taiwan University
Biography
Liang-Gee Chen (陳良基) is a Professor of Electrical Engineering at National Taiwan University in Taipei.He obtained his B.Sc.,
M.Sc. and Ph.D. degrees from National Cheng Kung University, Tainan, Taiwan, R.O.C. in 1979, 1981, and 1986, respectively. In
1988, he joined the Department of Electrical Engineering, National Taiwan University. During 1993–1994, he was a Visiting
Consultant in the DSP Research Department, AT&T Bell Labs, Murray Hill, NJ. In 1997, he was a Visiting Scholar of the Department
of Electrical Engineering, University of Washington, Seattle. During 2004-2006, he was the Vice President and General Director
of the Electronics Research and Service Organization (ERSO) of the Industrial Technology Research Institute (ITRI). Since 2007,
he has been serving as a Co-Director General of National SoC Program. He was the Deputy Dean of office of Research and
Development in National Taiwan University during 2008-2009. During 2009-2012, he was the Deputy Dean of college of EECS
and a Distinguished Professor of Department of Electrical Engineering at National Taiwan University. He was the President
of National Applied Research Laboratories during 2012-2013. He was the Executive Vice President for Academics & Research
of National Taiwan University during 2013-2016. He was the Political Deputy Minister of Ministry of Education, Taiwan, R.O.C.
during 2016-2017. From 2017 to 2020, he was the Minister of Ministry of Science and Technology, Taiwan, R.O.C.He has been
an IEEE Fellow from 2001 for his contributions to algorithm and architecture design on video coding systems. In 2009, he was
awarded TWAS Prizes and National Professorship. His research interests are DSP IC design, video signal processing and bio-signal
processing. He has authored over 550 publications, 48 patents and 31 US patents.Dr. Chen has served in editorial capacity for
various journals within the circuit design and system processing community. He is a member of Phi Tau Phi and has been an
elected Fellow of the U.S. National Academy of Inventors since 2016.
Abstract
Due to the technology innovation, the world is driving into the intelligent society. The core of the intelligent capability comes
from many smart technologies. The most valuable enabling technology is the huge progressing in infrastructure technology
improving HPC server, High-bandwidth communication, and low energy edge sensing and computing. All kind of social data,
generated by machine as well as human being, transferred between users and service providing environments with the help of
deep learning. Those data inference and make lots of incredible functions come true, for example, self-driving car, unmanned
shop, automotive factory, even work-from-home.Semiconductor is no doubt the carrier for all the data. The shrinking of
semiconductor technology makes chip small enough and become invisible embedded into the world. However, it is the circuits
and systems technologies provide the high-performance data processing, deliver high bandwidth transmission, and offer the
low energy device for sensing and computing. Taiwan, the world-wide most important semiconductor manufacturing industry
cluster, also sensed this big technology trend and demand. We initiated a very important project, called “semiconductor moon
shot program”. In this presentation, the detail of the program and latest achievements will be presented. The semiconductor
moonshot program was initiated by the Ministry of Science and Technology, while I served as Minister. The purpose of the
program is to enhance the competitiveness of the semiconductor industry in the core technologies of artificial intelligence (AI)-
powered edge computing. From 2018 to 2021, we focus on the research and development of new semiconductor processes
and advanced chip systems centered on intelligent edge computing, with an eye toward gaining an advantage in the market
for applications of AIoT, or AI over the internet of things. The program has six segmented technology parts: next-generation
memory designs; process technologies and materials for key components of sensing devices; unmanned vehicles and
augmented and virtual reality applications; and Internet of Things systems and security. So far, the program already got many
exciting progressing. We believe with the success of this semiconductor moonshot program, circuits and systems technology
will create a friendly AI-eco environment and keep semiconductor moving to provide an intelligent society.
IEEE International Symposium on Circuits and Systems | 9
Keynote 2
05-24 (Monday) 15:00-16:00 l Convention Hall B
How Will the Evolution of Personalized
Portable Systems Affect the Smart Society?
Min-Goo Kim
Executive Vice President, System LSI Business, Samsung Electronics
Biography
In 1993, Min-Goo Kim joined Samsung Electronics, Suwon, Korea where he played a key role in developing of
wireless digital communication technologies such as digital-AMPS, CDMA, and OFDMA. He received his Ph.D.
degree in electronics engineering from Seoul National University (SNU), Seoul, Korea. His areas of expertise
are in mobile station technologies and its implementation in efficient way. Also his research interest includes
standardization of wireless communications. From 1998, he participated 3GPP standard meeting and contributed
advanced technologies for UMTS standards. From 2000, he participated 3GPP2 standard meeting and contributed
advanced technologies for HARQ and AMC (adaptive modulation and coding). He proposed the HARQ structure
with turbo codes in 3GPP, 3GPP2, and IEEE802.16m such as “circular buffer based HARQ structure for incremental
redundancy scheme with turbo codes”.
He was the recipient of the person of merit for the 20th anniversary of 2nd foundation of Samsung Electronics,
2004 Korean President Award for Excellence in Invention on the 39th National Industry Invention Day, 2006 Hae-
Dong Award for Excellence in Research, 2019 Korean President Award (Industrial Medal) for Excellence in System
on Chip (SOC) on the 12th Semiconductor Day, and several awards based on research and industrial merit. He was
a member of NGMN (Next Generation of Mobile Networks) and LSTI (LTE/SAE Trial Initiative).
He is currently head of the SOC Development in Samsung Electronics S.LSI Division. His current research interests
include 5G New Radio, power-efficient SoC technologies and next generation GPU.
Abstract
In COVID-19 and Un-tact era, personal and portable devices rule out the world through the social media.
Computing, communications, photos & videos, financing, security, and game are merged into the smartphone.
Personalized portable systems continue to evolve and are equipped with very high-performance SoC (System
on Chip) composed of new and complicated processors such as CPU, GPU, NPU, DSP, and 5G modem. System’s
evolution keeps increasing exponentially, e.g. LTE to 5G/6G, wider bandwidth and very low latency could come up
with the change of portable devices and user’s experience.
However, recently CMOS technology approach the physical limits, scaling will no longer be the sole contributor
to performance improvement. In personalized portable devices, power consumption becomes a critical factor for
successful implementation, and power optimization (performance per watt) is a big issue.
In the lecture, we will discuss what breakthrough in circuit and systems (CAS), and what is the most important
metric in CAS. Perhaps power consumption is one of the important factors. Personalized portable system’s
requirements and its technology could trigger the breakthrough of CAS.
10 | ISCAS 2021Keynote 3
05-25 (Tuesday) 09:00-10:00 l Convention Hall B
Neuromorphic Intelligence: Brain-
Inspired Processing Technologies for
Extreme-Edge Use Cases
Giacomo Indiveri
University of Zurich and ETH Zurich
Biography
Giacomo Indiveri is a dual Professor at the Faculty of Science of the University of Zurich and at Department of
Information Technology and Electrical Engineering of ETH Zurich, Switzerland.
He is the director of the Institute of Neuroinformatics (INI) of the University of Zurich and ETH Zurich. He
obtained an M.Sc. degree in electrical engineering and a Ph.D. degree in computer science from the University
of Genoa, Italy. He was a post-doctoral research fellow in the Division of Biology at Caltech and at the Institute
of Neuroinformatics of the University of Zurich and ETH Zurich. He was awarded an ERC Starting Grant on
“Neuromorphic processors” in 2011 and an ERC Consolidator Grant on neuromorphic cognitive agents in 2016.
His research interests lie in the study of real and electronic neural processing systems, with a particular focus
on spike-based learning and spike-based recurrent neural network dynamics. His research and development
activities focus on the full custom hardware implementation of real-time sensory-motor systems using analog/
digital neuromorphic circuits and emerging memory technologies.
Abstract
Artificial Intelligence (AI) and deep learning algorithms are revolutionizing our computing landscape, and have
demonstrated impressive results in a wide range of applications. However, they still have serious shortcomings for
use cases that require closed-loop interactions with the real-world. Current AI systems are still not able to compete
with biological ones in tasks that involve real-time processing of sensory data and decision making in complex
and noisy settings. Neuromorphic Intelligence (NI) aims to fill this gap by developing ultra-low power electronic
circuits and radically different brain-inspired in-memory computing architectures. NI hardware systems implement
the principles of computation observed in the nervous system by exploiting the physics of their electronic devices
to directly emulate the biophysics of real neurons and synapses.
In this lecture I will present examples of NI circuits, and demonstrate applications of NI processing systems to
extreme-edge use cases, that require low power, local processing of the sensed data, and that cannot afford to
connect to the cloud for running AI algorithms.
IEEE International Symposium on Circuits and Systems | 11Keynote 4
05-25 (Tuesday) 15:00-16:00 l Convention Hall B
Memory & Storage Challenges for
Data-centric Cloud
Kyoung Park
VP, Memory System Research, SK Hynix
Biography
Kyoung Park received his MS degree in computer engineering from Chonbuk National University, Jeonju, Rep.
of Korea and PhD from Korea University, Seoul, Rep. of Korea, in 1993 and 2008, respectively. He joined ETRI,
Daejeon, Seoul, Rep. of Korea, in 1993, and he had worked with ETRI for 24 years. He was involved with several
high performance computing architecture research project including symmetric multiprocessing system, massive
parallel computing system and high‐performance cluster computing systems. He also worked in network I/O
offloading architecture, big data analytics platform and large scale deep learning for vision intelligence as project
leader and department manager. Since 2017, he is working with SK Hynix in Icheon, Rep. of Korea, as a leader of
memory system research. Currently, his research includes next generation data center architecture, memory &
storage software and new concepts of future memory solutions.
Abstract
With the acceleration of digital transformation, the integration of AI and Big Data is likely to create new values
and to lead us towards an era of data-centric cloud, where large amounts of data is created, delivered and
analyzed with unprecedented speed and accuracy. To enable such transformation and realize data-centric
cloud, increasingly high speed, low power, high capacity, and high reliability memory semiconductors are
required. Within the memory semiconductor industry, we have continued to overcome the technological
challenges of DRAM scaling and NAND flash stacking by making continuous improvements. However, the
pace of semiconductor technology development is yet to catch up with the rate at which data is produced,
which necessitates still more innovative semiconductor technologies to handle the explosive growth in data.
In this speech, I would like to introduce SK hynix’s journey towards future data-centric era and also discuss next
generation memory-centric system R&D directions to overcome the hurdles facing with data-centric cloud
infrastructure.
12 | ISCAS 2021Keynote 5 (Only Virtual Platform)
05-26 (Wednesday) 09:00-10:00 l Virtual Platform
Efficient Computing for AI and Robotics:
From Hardware Accelerators to Algorithm
Design
Vivienne Sze
MIT
Biography
Vivienne Sze (http://sze.mit.edu/) is an associate professor in MIT’s Department of Electrical Engineering and
Computer Science and leads the Research Lab of Electronics’ Energy-Efficient Multimedia Systems research group.
Her group works on computing systems that enable energy-efficient machine learning, computer vision, and
video compression/processing for a wide range of applications, including autonomous navigation, digital health,
and the internet of things. She is widely recognized for her leading work in these areas and has received many
awards, including faculty awards from Google, Facebook, and Qualcomm, the Symposium on VLSI Circuits Best
Student Paper Award, the IEEE Custom Integrated Circuits Conference Outstanding Invited Paper Award, and
the IEEE Micro Top Picks Award. As a member of the Joint Collaborative Team on Video Coding, she received the
Primetime Engineering Emmy Award for the development of the High-Efficiency Video Coding video compression
standard. She is a co-author of the book entitled “Efficient Processing of Deep Neural Networks”.
Abstract
The compute demands of AI and robotics continue to rise due to the rapidly growing volume of data to be
processed; the increasingly complex algorithms for higher quality of results; and the demands for energy
efficiency and real-time performance. In this talk, we will discuss the design of efficient hardware accelerators and
the co-design of algorithms and hardware that reduce the energy consumption while delivering real-time and
robust performance for applications including deep neural networks and autonomous navigation. We will also
highlight important design principles, methodology, and tools that can facilitate an effective design process.
IEEE International Symposium on Circuits and Systems | 13WiCAS
05-24 (Monday) 13:00~15:00 l Convention Hall A
Time Title Presenter
13:00-13:30 Luncheon
Session Chair 1 (Online): Soo Youn Kim, Dongguk University, Korea
Session Chair 2 (Onsite): SoYoung Kim, SungKyunKwan University, Korea
Soo Youn Kim, Dongguk University, Korea
13:30-13:35 Opening
SoYoung Kim, SungKyunKwan University, Korea
13:35-13:40 Welcome Remarks Yoko Utame, Tokushima University
Ultrafine Time Resolution, Linear Time-
13:40-14:10 Hayun Chung, Korea University
to-Digital Converter Design
Building a Career in Science and
14:10-14:40 Ljiljana Trajkovic, Simon Fraser University
Engineering
14:40-15:00 Discussions and Networking
YP Event
05-25 (Tuesday) 13:00~15:00 l Convention Hall B
Time Title Presenter
13:00 -13:30 Luncheon
Machine Learning for Analytics Architecture: AI to Chris Gwo Giun Lee, National Cheng
13:30-13:40
Design AI Kung University
How to build good AI product from the research:
13:40-13:50 Jinwook Oh, Rebellions.ai
AI Hardware Solution Startup Perspective
Machine Learning Side Channel Attacks and their Bah-Hwee Gwee, Nanyang
13:50-14:00
Countermeasures on Secured Microchips Technological University
Silicon Works: driving new technology and
Jongsup Baek, Silicon Works MCU
14:00-14:10 innovation to address challenges in functional
Business
safety and cybersecurity
14:15 -14:45 Panel Discussion
14:45 -15:00 Social Networking
14 | ISCAS 2021AutoCAS
05-25 (Tuesday) 09:45~16:45 l Convention Hall C
Time Title Presenter
09:45-10:00 Opening
Mohammed Ismail Elnaggar & Seyedeh
10:00-11:00 A Multiband 5G V2X Radio Architecture
Masoumeh Navidi, Wayne State University
Review for In-Vehicle Network and Electrical
11:00-11:35 and Electronic Architecture in Next- Seung-Yun Ryu, Infineon Technologies
Generation Vehicle
11:35-12:10 Cyber Security for Automotive Ethernet Boheung Chung, ETRI
Radiation Effects on SoC and Functional
12:10-12:45 Sung Soo Chung, QRT
Safety for Road Vehicles
12:45-13:45 Lunch
13:45-14:20 Software-Defined End to End Autonomy Minseok Oh, Nvidia
Autonomous Driving SW Platform
14:20-14:55 Junmuk Lee, Hyundai Autoever
Development Strategy and Core Technology
V2X Communications for Future Connected Barbara Masini, Italian National Research
16:10-16:45
and Automated Vehicles Council (CNR)
IEEE International Symposium on Circuits and Systems | 15Overview Lectures (Only Virtual Platform)
05-26 (Wednesday) 15:00-15:45 l Virtual Platform
Title Speaker
Compression Distortion and Refocussing Analysis in 3D Imaging Vladan Velisavljevic
Memristive Devices for Computation-in-Memory Applications Stephan Menzel
Wearable and Portable Microwave Medical Sensing and Imaging Devices and Tughrul Arslan,
Systems Imran Saied
Neuromorphic Technologies for Biomedical Applications Arindam Basu
05-27 (Thursday) 09:00 – 09:45 l Virtual Platform
Title Speaker
Low Power Challenges in IoT and IoE Ricardo Reis
Recent Progresses of Compute-in-Memory for Deep Learning Inference Engine Shimeng Yu
In Memory Computing with Emerging Memory Technologies Qiangfei Xia
Programmable Analog IC Design and Computation Jennifer Hasler
15:00 – 15:45 l Virtual Platform
Title Speaker
Lightweight Deep Learning on IoT Devices Wen-Huang Cheng
Seokbum Ko,
Posit Arithmetic and Its Applications in Deep Learning Computation
Hao Zhang
Energy Efficiency in Video Communications Christian Herglotz
Controlling the Chaos: Adaptive Symmetry Approach Denis Butusov
05-28 (Friday) 09:00 – 09:45 l Virtual Platform
Title Speaker
Generalized and Algorithmic Logic Locking Xinmiao Zhang
Low Power Convolutional Neural Network (CNN) Accelerator Design Techniques
Jongsun Park
for both Inference and Training
Learning Based Visual Data Compression – Technologies and Standards Shan Liu
Interacting Dynamics Revaluation for High Renewable Penetrated Power System Zhen Li
16 | ISCAS 2021Technical Program
05-24 (Monday) Presentation Room 1-10
ORAL / LIVE DEMO l 10:00-11:40
Sessions Presentation Room
AL1-01 Sigma Delta ADC I Room 1 (Inter 4)
AL1-02 Electronic Design Automation & Physical Design I Room 2 (Inter 3)
AL1-03 Wireline Communications I Room 3 (Inter 2)
AL1-04 Power Management Circuit Techniques Room 4 (Inter 1)
AL1-05 Biomedical Signal Detection & Conversion Circuits & Systems Room 5 (Park 1)
AL1-06 Image Sensors Room 6 (Park 2)
AL1-07 Neural Network & Neuromorphic Accelerators I Room 7 (Park 3-4)
AL1-08 Modeling & Control of Nonlinear Networks Room 8 (Park 5-6)
AL1-09 CAS Journal Papers: Analog & Mixed Signal Circuits & Systems I Room 9 (Park 7)
AL1-10 Live Demo I Room 10 (Park 8)
POSTER l 12:00-13:00
Sessions Presentation Room
A2P-14 ADCs for IoT Room 1 (Inter 4)
A2P-15 Digital Systems & Architectures for Machine Learning Room 2 (Inter 3)
A2P-16 Design Automation & Physical Design Room 3 (Inter 2)
A2P-17 Power Management & Other Applications in Power & Energy Room 4 (Inter 1)
A2P-18 Image & Other Sensors Room 5(Park 1)
A2P-19 Applications in Machine Learning Room 6(Park 2)
A2P-20 Visual Signal Processing & Communications Room 7 (Park 3-4)
A2P-21 Emerging AID Multimedia Applications & Implementations Room 8 (Park 5-6)
A2P-22 Emerging Visual Information Representation & Processing Room 9 (Park 7)
IEEE International Symposium on Circuits and Systems | 17Technical Program
05-24 (Monday) Presentation Room 1-10
ORAL l 16:00-17:40
Sessions Presentation Room
A3L-01 Analog Circuits I Room 1 (Inter 4)
A3L-02 Electronic Design Automation & Physical Design II Room 2 (Inter 3)
A3L-03 Wireline Communications II Room 3 (Inter 2)
A3L-04 Integrated Power Circuits & Charge Pumps Room 4 (Inter 1)
A3L-05 Biomedical Sensing & Signal Detection Circuits & Systems Room 5 (Park 1)
A3L-06 Integrated Sensory Systems Room 6 (Park 2)
A3L-07 Machine Learning & Neural Networks Room 7 (Park 3-4)
A3L-08 Advances in Digital Filters Room 8 (Park 5-6)
A3L-09 Efficient Circuits & System Implementations of Multimedia Processing Room 9 (Park 7)
A3L-10 SPECIAL SESSION: Memristive Logic, Analog, & Memory Circuits Room 10 (Park 8)
18 | ISCAS 2021Technical Program
05-25 (Tuesday) Presentation Room 1-10
ORAL l 10:00-11:40
Sessions Presentation Room
B2L-01 Phase Locked Loops Room 1 (Inter 4)
B2L-02 Circuits for Energy Efficiency & Robustness Room 2 (Inter 3)
B2L-03 Cryptography & Hardware Security Room 3 (Inter 2)
B2L-04 Transmitters & Receivers Room 4 (Inter 1)
B2L-05 Advanced Computing in Memory Strategies Room 5 (Park 1)
B2L-06 Biometrics & Biomedical Signal/Image Processing Room 6 (Park 2)
B2L-07 Neural Network Accelerators Using Emerging Memory Technologies Room 7 (Park 3-4)
B2L-08 SPECIAL SESSION: Advanced Energy-Efficient Wireline & Optical
Room 8 (Park 5-6)
Communications
B2L-09 SPECIAL SESSION: Analog Computing, SoC, and Processing-in-Memory
Room 9 (Park 7)
for AI Hardware
POSTER l 12:00-13:00
Sessions Presentation Room
B3P-14 Analog Techniques Room 1 (Inter 4)
B3P-15 Low Power Circuits & Architectures Room 2 (Inter 3)
B3P-16 Hardware Security Room 3 (Inter 2)
B3P-17 Wireline & Wireless Communications I Room 4 (Inter 1)
B3P-18 Biomedical Signal Processing, Algorithms, and Learning Circuits &
Room 5 (Park 1)
Systems
B3P-19 Deep Learning Systems II Room 6 (Park 2)
B3P-20 DSP Systems Room 7 (Park 3-4)
IEEE International Symposium on Circuits and Systems | 19Technical Program
05-25 (Tuesday) Presentation Room 1-10
ORAL l 16:00-17:40
Sessions Presentation Room
B4L-01 Sigma Delta ADC II Room 1 (Inter 4)
B4L-02 Low-Power Logic, Circuits & Architectures I Room 2 (Inter 3)
B4L-03 Error Correction Codes Room 3 (Inter 2)
B4L-04 Modeling & Control of WPT Systems & Energy Grids Room 4 (Inter 1)
B4L-05 Biomedical Sensing & Imaging Systems Room 5 (Park 1)
B4L-06 Spiking Neural Networks & Systems II Room 6 (Park 2)
B4L-07 DSP Implementation Room 7 (Park 3-4)
B4L-08 SPECIAL SESSION: Emerging Memories for Unconventional Computing Room 8 (Park 5-6)
B4L-09 SPECIAL SESSION: Artificial Intelligence Computation In Memory & Their
Room 9 (Park 7)
Applications Utilizing Next-generation Memory
B4L-10 CAS Journal Papers: Communication & Network Systems Room 10 (Park 8)
POSTER / LIVE DEMO l 17:40-18:40
Sessions Presentation Room
B5P-14 ADC & Interface Circuits Room 1 (Inter 4)
B5P-15 Arithmetic Circuits & Reconfigurable Architectures Room 2 (Inter 3)
B5P-16 Wireline & Wireless Communications II Room 3 (Inter 2)
B5P-17 Circuits & Systems for Energy Harvesting II Room 4 (Inter 1)
B5P-18 EMG & ECG-based Sensing Circuits & Systems Room 5 (Park 1)
B5P-19 Neuromorphic Systems II Room 6 (Park 2)
B5P-20 Memristor Technologies for Edge-Computing Applications Room 7 (Park 3-4)
B5P-21 Live Demo II Room 8 (Park 5-6)
20 | ISCAS 2021Technical Program(Only Virtual Platform)
05-26 (Wednesday)
ORAL l 10:00-11:40
Sessions
C1L-01 RF Power Amplifiers
C1L-02 Hardware Security for Logic, Circuits & Architectures
C1L-03 Electronic Design Automation
C1L-04 Modeling & Control of Power Converters I
C1L-05 Nanodevices, Nanocircuits & Systems
C1L-06 Deep Learning Systems I
C1L-07 Visual Signal Coding & Quality Assessment
C1L-08 SPECIAL SESSION: Circuits & Systems of Artificial Intelligence & Security for 5G
C1L-09 SPECIAL SESSION: Low Power Design for Emerging Applications
C1L-10 SPECIAL SESSION: New Approaches for Interfacing Electronic & Biological Systems
POSTER l 12:00-13:00
Sessions
C2P-14 RF Circuits & PLLs
C2P-15 System on Chip, Network on Chip, & Multi-Core Systems
C2P-16 Regulators & References
C2P-17 Advanced Processing Systems with Emerging Technologies
C2P-18 DSP Theory & Algorithms I
C2P-19 Neural Network & Neuromorphic Accelerators II
IEEE International Symposium on Circuits and Systems | 21Technical Program(Only Virtual Platform)
05-26 (Wednesday)
ORAL l 16:00-17:40
Sessions
C4L-01 SAR ADC
C4L-02 Hardware Security for Internet-of-Things, Cyber-Physical Systems
C4L-03 Conventional & Emerging Memory Circuits, Architectures & Interconnect Technologies
C4L-04 Spiking Neural Networks & Systems I
C4L-05 Non-linear Theory in Energy Conversion Applications
C4L-06 SPECIAL SESSION: 5G & Beyond
C4L-07 SPECIAL SESSION: Memristive Computing & Training for Edge Intelligence
C4L-08 SPECIAL SESSION: Optimized Image/Video Coding Based on Deep Learning
C4L-09 CAS Journal Papers: Digital Circuits & Systems
POSTER l 17:40-18:40
Sessions
C5P-14 Amplifiers & Analog Techniques
C5P-15 Circuits, Systems & Architectures for Machine Learning & Hardware Security
C5P-16 Modeling & Control of Power Converters II
C5P-17 Brain, Neural & DNA Technologies
C5P-18 Personalized Healthcare Circuits & Systems
C5P-19 Deep Learning Systems III
22 | ISCAS 2021Technical Program(Only Virtual Platform)
05-27 (Thursday)
ORAL l 10:00-11:40
Sessions
D2L-01 Design Tools
D2L-02 Datapath & Arithmetic Circuits & Systems
D2L-03 Programmable, Reconfigurable & Array Architectures
D2L-04 Analog Digital Converters
D2L-05 Circuits & Systems for Energy Harvesting I
D2L-06 Non-silicon & Emerging Devices
D2L-07 SPECIAL SESSION: Design & Detection of Hardware Trojans in Cyber-Physical Systems
D2L-08 SPECIAL SESSION: Machine-Learning Systems & Applications
D2L-09 SPECIAL SESSION: Cognitive Radio Systems & Hardware Security Techniques
POSTER l 12:00-13:00
Sessions
D3P-14 Phase Locked Loops II
D3P-15 Memory Circuits, Architectures & Interconnect Technologies
D3P-16 Hardware Security for Communications
D3P-17 Advanced Robust Emerging Technology Aspects
D3P-18 Teaching Techniques in Circuits & Systems
D3P-19 Intelligent Sensing & Interaction
IEEE International Symposium on Circuits and Systems | 23Technical Program(Only Virtual Platform)
05-27 (Thursday)
ORAL l 16:00-17:40
Sessions
D5L-01 ADC Building Blocks
D5L-02 Digital Circuits, Systems &Architectures for Machine Learning I
D5L-03 Wireless Communications
D5L-04 Amplifiers
D5L-05 Neuromorphic Systems I
D5L-06 SPECIAL SESSION: Next-Generation Edge AI Computing
D5L-07 SPECIAL SESSION: Multimodal Signal Processing
D5L-08 SPECIAL SESSION: Emerging Techniques of Memristive Systems
D5L-09 CAS Journal Papers: Hardware Security
POSTER l 17:40-18:40
Sessions
D6P-14 PLLs & RF Circuits
D6P-15 High Speed ADC
D6P-16 Biosensors & Bioelectronics
D6P-17 Chaos, Complexity & Game theory
D6P-18 DSP Theory & Algorithms II
D6P-19 Wearable Sensors & Energy Harvesting Circuits
24 | ISCAS 2021Technical Program(Only Virtual Platform)
05-28 (Friday)
ORAL l 10:00-11:40
Sessions
E2L-01 Voltage References
E2L-02 Low-Power Logic, Circuits & Architectures II
E2L-03 Adaptive & Array Based Signal Processing
E2L-04 Hardware & Systems for Visual Signal Processing
E2L-05 Educational Methods & Theories
E2L-06 SPECIAL SESSION: Wearable Sensing Techniques & Power Solutions for IoT Devices
E2L-07 SPECIAL SESSION: Analysis of Complex Networked Circuits & Systems from a Network Science
Perspective I
ORAL l 16:00-17:40
Sessions
E3L-01 Analog Circuits II
E3L-02 Digital Circuits, Systems & Architectures for Machine Learning II
E3L-03 Multimedia Processing with Deep Neural Networks
E3L-04 Tunable Filters
E3L-05 SPECIAL SESSION: Beyond Moore’s Law &More than Moore
E3L-06 SPECIAL SESSION: Analysis of Complex Networked Circuits & Systems from a Network Science
Perspective II
E3L-07 CAS Journal Papers: Analog & Mixed Signal Circuits & Systems II
IEEE International Symposium on Circuits and Systems | 25Sponsorship
Diamond
Gold
Silver
Bronze
Joint-Event Sponsorship
26 | ISCAS 2021On-site Venue Map
INFORMATION
3
1 2
1 Main Building
Convention Hall
+
Ladies Hall
2F Amante Hall
Buffet Restaurant
+ Joyful Hall
1F Happy Hall
2 Inter Village
3 Park Village
IEEE International Symposium on Circuits and Systems | 27Floor Plan
Main Conference
2F (Main)
Location
Date
A B C
Presentation Rooms
Lobby
Networking Rooms
A Convention Hall A
23 YP Mentoring Reception 24 WiCAS
B Convention Hall B
24 Opening Ceremony, Keynote Speeches, Awards Ceremony
25 YP Event, Keynote Speeches
C Convention Hall C
25 AutoCAS
Lobby Exhibitions
Presentation Rooms
Inter Village | Main Building (3F) Park Village | Park Village Building (2F)
ter 1
Room 9 Room
(In om
4)
Room 6 Room 7 Room 8 (Park 7) 10
Ro
Presentation (Park 2) (Park 3-4) (Park 5-6) (Park 8)
Room 1-4 Presentation
Ro
(In om Room 5-10
er 2
t
3) Room 5
Room 3 Room 4 (Park 2)
(Inter 1)
(Inter 2)
Room 11
Presentation Room 5-10
Presentation Oral / Poster Presentation
Rooms
28 | ISCAS 2021Program at a Glance
Korea Time 05-29 (Saturday)
05-22 (Saturday) 05-23 (Sunday) 05-24 (Monday) 05-25 (Tuesday) 05-26 (Wednesday) 05-27 (Thurday) 05-28 (Friday)
(GMT+9) CSET (GMT+2)
8:30 8:40
8:40 8:50
Opening Ceremony
8:50 9:00 Convention Hall B
9:00 9:10
9:10 9:20 Overview Overview
9:20 9:30
9:30 9:40
Keynote 1 Keynote 3 Keynote 5 Lectures Lectures
9:40 9:50 Convention Hall B Convention Hall B
9:50 10:00
10:00 10:10 Full
10:10 10:20 Half Half Day
10:20 10:30 Tutorials Tutorials Tutorial Synopsys
10:30 10:40 Oral Live Oral Mini AutoCAS Oral Mini Oral Mini
10:40 10:50 Sessions Demo Sessions Tutorial Convention Sessions Tutorials Sessions Tutorial Oral Sessions
10:50 11:00
11:00 11:10
1 Hall C
11:10 11:20 Presentation Presentation
11:20 11:30 Room 1 - 10 Room 1 - 10
11:30 11:40
11:40 11:50
11:50 12:00
Breakout Breakout Breakout Breakout
12:00 12:10
12:10 12:20
12:20 12:30 Poster Sessions Poster Sessions Poster Sessions Poster Sessions
12:30 12:40
12:40 12:50 Presentation Presentation
12:50 13:00 Room 1 - 10 Room 1 - 10
13:00 13:10 Opening
13:10 13:20 Breakout
13:20 13:30 Student Design
13:30 13:40 Competition Keynote 1
13:40 13:50
13:50 14:00
14:00 14:10 Lunch / WiCAS Lunch / YP
14:10 14:20
14:20 14:30 Convention Hall A Convention Hall B
14:30 14:40
Lecture
14:40 14:50 Session 1
14:50 15:00 AutoCAS
15:00 15:10
15:10 15:20 Convention Overview Overview
15:20 15:30
Keynote 2 Keynote 4 Hall C Lectures Lectures Breakout
15:30 15:40
15:40 15:50 Convention Hall B Convention Hall B
15:50 16:00
16:00 16:10
Keynote 2
16:10 16:20 Full
16:20 16:30 Half Half
Day Oral Mini
16:30 16:40 Tutorials Tutorials
16:40 16:50 Tutorial Oral Sessions Oral Sessions Sessions Tutorial Oral Sessions Oral Sessions Lecture
16:50 17:00
Presentation Presentation Session 2
17:00 17:10
Room 1 - 10 Room 1 - 10
17:10 17:20
17:20 17:30
17:30 17:40
17:40 17:50 Wrap up
Breakout Closing Remarks
17:50 18:00 Poster Live
18:00 18:10
18:10 18:20 Sessions Demo Poster Sessions Poster Sessions
18:20 18:30 Student Design 2
Presentation
18:30 18:40 Competition
18:40 18:50 Room 1 - 10
18:50 19:00
YP Mentoring
19:00 19:10 Reception Banquet
19:10 19:20
19:20 19:30 Convention Hall A Convention Hall B
19:30 19:40
19:40 19:50
19:50 20:00
IEEE International Symposium on Circuits and Systems | 29You can also read
