IMPLEMENTATION OF LONG TERM EVALUATION BASED TURBO COMMUNICATION SYSTEM USING MAP APPROACH

Vol 13, Issue 05, MAY/ 2022

 ISSN NO: 0377-9254
 IMPLEMENTATION OF LONG TERM EVALUATION BASED TURBO
 COMMUNICATION SYSTEM USING MAP APPROACH
 1
 PITTI BRAMHENDRA,2ZIAUR RAHMAN SHAIK, 3FAROOQ ANWAR
 1
 M.Tech Student, 2,3Associate Professor
 DEPARTMENT OF ECE
 GLOBAL COLLEGE OF ENGINEERING & TECHNOLOGY, KADAPA

 Abstract: Turbo codes are error correction codes algorithm needs very typical hardware. While the
 that are widely used in communication systems. decoding operation is in advance, the functioning
 Turbo codes exhibits high error correction obstructions can be eliminated, So that an
 capability as compared with other error improved method, Adaptive Turbo Algorithm is
 correction codes. This paper proposes a Very used. The decoding of codes can be done very
 Large Scale Integration (VLSI) architecture for fast, as this algorithm is very effective in high
 the implementation of Turbo decoder. Soft-in- speed functions. Convolution codes are used to
 soft out decoders, inter-leavers and de-inter gain a possible code sequences AVA uses
 leavers is used in the decoder side which employs maximum –likelihood decoding process.
 Maximum-a-Posteriori (MAP) algorithm. The Hardware description language called
 number of iterations required to decode the Verilog HDL is used to valuate this project,
 information bits being transmitted is reduced by where it is one of the hardware descriptive
 the use of MAP algorithm. For the encoder part, languages that stand for Verilog Hardware
 this paper uses a system which contains two Description Language. This language is
 Recursive convolutional encoders along with employed in designing the electronic systems to
 pseudorandom interleaver in encoder side. semiconductor and electronic design industries as
 1.INTRODUCTION well as for assuring the analog and mixed signal
 1. 1. Overview circuit. This research makes use of two main tools
 In the present scenarios, data transferring namely MODELSIM – Simulation and XILINX-
 between the systems plays a vital role as the ISE – Synthesis for successfully reaching its
 technologies are increasing day-by-day the objectives. Further of this research provides a
 number of users is simultaneously increasing. clear description on Adaptive Turbo Algorithm,
 This wide usage leads to major issues in the its execution process and various kinds of
 digital communication systems and results in data languages and tools for evaluating the Turbo
 corruptions. It’s very necessary for the Algorithm.
 telecommunication to reduce the data corruption Convolutional coding has been used in
 by providing a suitable solution to the errors communication systems including deep space
 occurred in the communication process. One such communications and wireless communications. It
 method that decodes the process by offers an alternative to block codes for
 simultaneously correcting the process effectively transmission over a noisy channel. An advantage
 is Turbo algorithm . For decoding the convolution of convolutional coding is that it can be applied
 codes Turbo algorithm is the highest recognizable to a continuous data stream as well as to blocks
 algorithm. This algorithm may be described with of data. IS-95, a wireless digital cellular standard
 software as well as hardware implementations. for TURBO (code division multiple access),
 To engage well organized communications an employs convolutional coding. A third generation
 efficient data is presented by the digital systems. wireless cellular standard, under preparation,
 Data corruptions are the important issue plans to adopt turbo coding, which stems from
 confronted by the digital communication convolutional coding. The Turbo decoding
 systems. To decrease data corruptions error algorithm, proposed in 1967 by Turbo, is a
 correcting codes is a best technique. Al most all decoding process for convolutional codes in
 communication systems followed it because it’s memory-less noise [52].
 power to decode efficiently, even Turbo

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 The algorithm can be applied to a host of [50], [21], [5] and implementation of Turbo
 problems encountered in the design of decoders were investigated intensively in the past
 communication systems [52]. The Turbo three decades. Most relevant works in low-power
 decoding algorithm provides both a maximum- design of Turbo decoders include [23], [27], [28],
 likelihood and a maximum a posteriori algorithm. [33], [36] and [43]. Seki et al, [43] and Lang et al,
 A maximum a posteriori algorithm identifies a ] suggested use of a scarce state transition (SST)
 code word that maximizes the conditional scheme [32]. The scheme uses a simple pr
 probability of the decoded code word against the encoder and a pre-encoder to minimize
 received code word, in contrast a maximum transitions at the input of a Turbo decoder. This
 likelihood algorithm identifies a code word that reduces dynamic power dissipation. Kang and
 maximizes the conditional probability of the Wilson [27] suggested partitioning major blocks
 received code word against the decoded code at the system level and the reduction of spurious
 word. The two algorithms give the same transitions at a lower level. Garrett and Stan [23]
 resultswhen the source information has a uniform suggest a specialized SRAM cell structure that
 distribution. allows a sequential write update and parallel read
 Traditionally, performance and silicon access across the memory in such a way that
 area are the two most important concerns in VLSI reduces dynamic power dissipation.
 design. Recently, power dissipation has also The above mentioned works showed that
 become an important concern, especially in their designs substantially reduce power
 battery powered applications, such as cellular dissipation of Turbo decoders. Unlike the
 phones, pagers and laptop computers. Power existing approaches, we introduce low-power
 dissipation can be classified into two categories, design techniques into the behavior of Turbo
 static power dissipation and dynamic power decoder. After the behavior of a Turbo decoder
 dissipation. was described in VHDL, we modified the
 Typically, static power dissipation is due behavior of the circuit to reduce dynamic power
 to various leakage currents, while dynamic power dissipation. Two major techniques, clock gating
 dissipation is a result of charging and discharging and toggle filtering, were investigated in this
 the parasitic capacitance of transistors and wires. thesis. In addition, a full scan for easy testing of
 Since the dynamic power dissipation accounts for the circuit was employed. In a full scan design, all
 about 80 to 90 percent of overall power sequential elements are controllable and
 dissipation in CMOS circuits; numerous observable during testing. In our experiments,
 techniques have been proposed to reduce estimated power dissipation was estimated on the
 dynamic power dissipation. These techniques can basis of the switching activity measured through
 be applied at different levels of digital design, behavioral simulation. Experimental results
 such as the algorithmic level, the architectural indicate that our methods effectively reduce the
 level, the gate level and, the circuit level. In this power dissipation of Turbo decoders.
 thesis, a low-power design of Turbo decoders at 1.2. Aim and Objectives:
 the gate level in the standard cell design Aim: Execution of Turbo algorithm applying
 environment is proposed. In the standard cell VHDL coding.
 design environment, the behavior of a design is Objectives:
 described in a high-level hardware description • To clearly understand the Hidden Markov
 language, such as VHDL or Verilog. model and Turbo encoder.
 The behavioral design is synthesized to • To evaluate the basic functionalities and steps
 generate a gate level design. The gate-level involved in Turbo algorithm
 design is placed and routed to generate a layout • To research on the implementation of Turbo
 of the design. The advantages of a standard cell algorithm through VHDL code
 based design over full custom design are -- faster • To critically analyze the results obtained
 turn around time for the design, ease in design through VHDL code.
 verification and more accurate modeling of the 1.3. Purpose of Study
 circuit. Low-power design of Turbo decoders at The main purpose of this study is to yield
 the gate-level is focused here. Turbo algorithms the gains obtained by the developers with the

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 usage of Turbo algorithm. This research mainly objectives and also ensure that some areas are of
 centers on the grandness of Turbo algorithm in research objectives will be derived and observed
 the practical applications with the VHDL code. using the secondary data. At the same time the
 This research not only helps the students related author will draw the conclusions based on the
 to the communications but it also helps the people secondary data collected and the primary data
 who are in the field of decoders as it is one of the gained from the experimental coding using
 efficient method for reducing the errors while VHDL programming language. At the same time
 communication procedure is in advance. Here, the research questions are designed based on
 VHDL code is used in order to implement the secondary data available in the initial research
 Turbo algorithm in a proper way. Apart from conducted by the researcher.
 various codes, researcher selected VHDL code 2. LITERATURE REVIEW
 for this research as it offers the high capability in Virtebi algorithm is an approach towards
 designing the electronic systems. Apart from finding the most common sequence of hidden
 students and the business people, one can easily states in all listed states. It is dynamic
 understand and analyze the Turbo algorithm programming algorithms that find the probability
 concepts and can gain more knowledge on the of all observed sequence for each combination. Pr
 VHDL code and the tools that are used in this (observed sequence | hidden state combination) It
 research. is a feasible procedure to find the common
 1.4. Research Method sequence .The complete calculation in each
 Research is a probe of new facts that are combination is much costly .It is evaluated for the
 exercised by the researchers. Generally, research error correction for noise in the digital
 method is an organized engineered which will communications. Virtebi algorithm is familiar
 determine the problems, suggest solutions and algorithm works on the state machine assumption
 finally prepares the gathered data. For, research for the conventional codes. By using the system
 the data need to be gathered from many resources can be modeled at certain state. There are finite
 where the researcher will identifies proves to be numbers of states. There will be a survivor path
 collected and the techniques that need to applied mostly a common path in a multiple sequence
 in the research . Generally there exist two path that can lead to a given state.
 methods for gathering the accurate data to the It can describe the hardware and the soft
 research. They are primary type and secondary ware implementations. The noisy channels are
 type. In the primary type the researcher need to usually corrected by the conventional codes as
 gather the data manually without referring or they are efficient for correcting the corrupted
 taking the ideas from other researchers where as channels. Satellite communications, TURBO and
 in the secondary type the researcher gathers the GSM cellular, dial modem, deep-space
 data from numerous resources by referring the communications and 802.11 wireless LANs.
 journals, magazines, books, etc . For the present Mostly use the conventional codes. Information
 research, it’s better to prefer the secondary theory, speech theory, keyword spotting,
 resources as this research deals with the computational linguistics and bioinformatics use
 implementation of turbo algorithm. Here, the this algorithm usually. The algorithm is not more
 researcher cannot depend only on primary data as likely i..e, it may create a numerable statements
 the researcher will not find data by interviewing [8]. In the first step both the observed events and
 of surveying the people as all the people cannot the hidden events must be within the same
 know about this algorithm. sequence and that sequence must resemble the
 So, it’s better to prefer the secondary time. While comes to the next step the two
 resources where the researcher can easily analyze sequences must be put together and the known or
 the about the turbo algorithm by referring to the observed events must resemble the accurate
 various journals and at last this algorithm can be one hidden event.
 implemented with the VHDL code to obtain the
 required result. In this research the researcher will The next coming thirds step computing
 go for a method of implementing VHDL the most probable hidden sequence up to certain
 programming to derive few areas of research point “t” depends on the absorbed point within

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 the sequence at point “t-1”.The algorithm is at least one of the most likely paths to the state
 examines the forward by moving to new set of when number of sequences of paths can be
 states by combining the metric of possible directed to given state. The most likely state is
 previous states with the incremental metric of kept by examining all the possible states which
 transition due to the event and select the best for are the fundamental assumption of the algorithm.
 a event occurred. In many cases the state Thus by keeping only one path is necessary and
 transition graph is not connected fully. This do not need to keep all the track of all states. This
 algorithm can relate the active programming that is the first assumption. A new path from the
 discovers the single most probable observed previous state is marked by additive metric which
 sequence. Sometimes the statically parsing active is the second assumption. And the third
 programming can be used to detect the single assumption is that in some sense events are
 most common context-free derivation of a string. accumulative over a state. By moving advance in
 After all compounding of the incremental metric a new state it chooses the best by combining the
 and the state metric computing only the best lasts additive metric with the previous path an new set
 and all other paths are disposed. In iterative Turbo of stated can be examined by the algorithm
 decoding one may find the sequence of engaged whenever an event occurs. The transition
 that corresponds the rightest for a given HMM property from old path to new path is linked with
 [9]. the additive metric [18]. Let us consider an
 3. RESEARCH ON PROPOSED SOLUTION example for this. It is only possible to beam half
 3.1. Overview of the symbols from even numbered path and the
 Research is generally defined as the human other half of the states from odd numbered path
 activity that is carried out based on the in data communications.
 intellectual application in the investigation of The state transition graph is not fully
 matter. Basically there are various approaches for connected in almost all cases. To find the
 the researcher to finish their task successfully but sequence of hidden states which is called as
 these people select the approaches depending on Turbo path the Turbo algorithm is used which is
 their research objectives [17]. For the present a dynamic programming algorithm. A state
 research, it’s better to prefer the secondary machine assumption is used for the functioning of
 resources when compare to the primary Turbo algorithm. There is finite number of states,
 resources. As the researcher may face problems at any time system being modeled in some state.
 while gathering the accurate The survivor path which is at least one of the most
 3.2. Language used for Turbo algorithm likely paths to the state when number of
 There are number of functional sequences of paths can be directed to given state.
 programming languages, since most of the The Turbo coder you will implement is based on
 hardware programs are written in hardware a 16-state rate 1/2 convolution coder with the
 description language such as VHDL (Very High following system equations:
 Speed Integrated Circuits) hardware description G0 (n) = x (n) + x (n-1) + x (n-3) + x (n-4)
 language which may not be programmed through G1 (n) = x (n) + x (n-2) + x (n-3) + x (n-4)
 imperative languages like C or MATLAB. There Where x (n) is the un-coded input and G0 (n), G1
 are basically two Turbo algorithms namely (n) are the encoded outputs
 isolated sign language Turbo algorithm and To implement the Turbo decoder we will use a
 continuous sign language Turbo algorithm both 16-state trellis diagram. This allows us to use the
 are standard used to search the frame specialized instruction set supported by the C54x
 simultaneously. To find the sequence of hidden DSP's
 states which is called as Turbo path the Turbo 4. BASICS OF TURBO CODING
 algorithm is used which is a dynamic Proposed solution for the problem: Turbo
 programming algorithm. Algorithm
 A state machine assumption is used for
 the functioning of Turbo algorithm. There is Wide range applications of the Turbo
 finite number of states, at any time system being algorithm are towards the DNA analysis, speech
 modeled in some state. The survivor path which appreciation for cell phones communication and

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 facilitates. The outcome of backtracks from all yt = arg maxy∈Y(VT,y)
 the branches may obtain the algorithm task. The Hidden Markov model and Turbo decoder
 Turbo algorithm can perform step-by-step Hidden Markova model
 function as illustrated: The chain of Markov is generally
 absorbed in noise processing signals. Markov
 1) Initialization: Arrange all metric in the perfect chain is symbolized as {Xk}k≥0, hear k is
 format. basically an integer index. So as to quit the finite
 2) Computation step j+1: Suppose the previous set that is for making secreted, Markov chain is
 step and use to identify the basic survivor paths hidden and can’t be observed in arbitrary state,
 for storage in allthe states. thus it is experimental known to be as stochastic
 3) Final step Continue to compute the entire process {Yk}k≥0 this is an another linked
 pending algorithm reaches with all-zero state like process, as Yk is governed with the Markov chain
 hood paths. Turbo algorithm is most likelihood in the distribution links [14]. This hidden
 detected sequence with the MLSD with in all the Markova model is known to be a bivariate
 inter-symbol interference (ISI) as well as memory discrete time process {Xk , Yk} k≥0, where
 less noise considering all the input state channel {Xk},{Yk} are the sequence of random
 as well as observable sequence . independent variables as {Xk} is the Markov
 Let the Hidden Markov Model(HMM) chain and conditional distribution of Yk. The
 with the states may be Y, at initial stage hidden Markov model (HMM) is a signal
 probabilities p I of being in state i and transition facilitates to communicate with speech signals
 probabilities a of transitioning from state i to which achieved acceptance from almost all the
 state j. Say we observe outputs . The state communication systems.
 sequence most likely to have produced the The fully discrete model with an idea of
 observations is given by the recurrence relations. conditional independence had introduced the
 Vok= P (Xo/k). k hidden Markov modes as a bivariate process. The
 Vt,k = P (xi,j).pk /k).maxy∈Y(ay,kVt-1,y hidden Markov models consist of two classic
 Here Vt,k is the probability of the most layers sub cellular location known as upper layer
 probable state sequence responsible for the first t and the functional class, which is lower layer. If
 +1 observations (we add one because indexing any process is undertaken in the hidden Markov
 started at 0) that has k as its final state. The Turbo model the doubly stochastic process can’t be
 path can be retrieved by saving back pointers observed directly since, it is hidden and may be
 which remember which state y was used in the observed only with another stochastic process
 second equation. Let Ptr (k,t) be the function that which will facilitates in sequential observation
 returns the value of y used to compute Vt,k if t >
 0, or k if t = 0. Then:

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 Figure 4.1.: Shows the hidden Markov model

 The two layers upper layer and lower • Chain back
 layer are joined for analyzing multiple paths for Before implementing the Turbo
 the flow from begin to end. Nodes present at the algorithm it is essential to collect and relate all the
 ends of two layers encode the standards which are noise with the Markov process in definite order.
 randomly hidden from the upper layer namely Turbo detector includes the ISI channels having
 location class variables with the lower that is the predetermined memory noise driven with the
 functional class variables. The direction of MLSD and MAP sequence detector is utilized.
 arrows present in between two layers is the Some of the important features of Turbo decoder
 transition flow indication there colors and shades as listed below:
 are indicated as per the estimated probability In most of the Industry standard k = 7.
 counts based on training sequence. Where (G0, G1) = (133, 171), rated at ½ Turbo
 decoder. It is possible to implement both with
 Turbo decoder: Xilinx FPGA or ASIC. There are 256 latency
 In general Turbo decoder apparatus Turbo clock cycle, Speed of the design is very high
 algorithm mainly for decoding as well as encode which is approximately up to 122 Mbps for the
 fragment flow by using he forward error Virtex II at the same time for Spartan III the data
 correction (FEC) intricacy encoding system. rate is nearly 108 Mbps and more high for ASIC.
 Turbo decoder is mainly employed for encoding The software input is of almost 4 bits. The length
 the convolutional data as it is able to overcome of track back will be of 64. Simple clock designs
 number of errors received at the input data due to are completely synchronous.
 channel noise. The Turbo decoding algorithm is a Block Diagram of Turbo algorithm
 state of the art algorithm used to decode The Turbo algorithm is one of the
 convolutional binary codes (viewed as a trellis standard sections in number of high-speed
 tree) used in communication standards (like modems of the process for information
 Qualcomm’s TURBO standard). In the infrastructure applicable in modern world. The
 implementation of input code symbol stream this dynamic algorithm includes some path metrics so
 Turbo decoder is used to operate in decoding with as to compute the path sequence transmitted
 some likely sequence. Turbo algorithm follows earlier the name Turbo algorithm arrived after
 the most likely path for maximum encoders and Andrew Turbo and is represented as VA for
 decoders with three main processing steps which reorganization, record of huge possibility
 are listed below : decodes as well as least reserved decoding are
 • Branch metric generation generally similar in a defined binary symmetric
 • State metric generation channel. Kia, J. (2005, p.1) explains Turbo

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 algorithm as a “dynamic algorithm that uses compare select and trace back unit. The unit of
 certain path metrics to compute the most likely branch metric will calculate all the branch metrics
 path of a transmitted sequence” [13]. The basic and then processed to add compare for selecting
 performance of the Turbo decoder is analyzed the surviving branches as per the branch metrics
 with the block diagram shown below. It consists finally the decoded data bits are generated by the
 of three main blocks branch metric unit, add trace back unit.

 Figure – 4.2: Shows the basic block diagram of Turbo decoder [14].

 Figure 4.3: Shows the Turbo algorithm trellis [15].
 For calculating the branch metric can be obtained the range of branch metric will range within -2 to
 with the trellis using the Euclidean analysis as +2. In case rr = bb branch metric would be 2,
 follows: Similarly r0 = - b0 as well as r1 = - b1 and BM=
 BM (rr, bb) = (r0-b0)2+ (r1+ b1)2 -2
 = The path metric (λ) in the minimum Euclidean
 r02−2r0b0+b02+r12−2r distance in the trellis does not required the actual
 1b1+b12 value the original order of the floating point pair
 = r0b0+r1b1 numbers is
 Where, λnew=λprev+r0b0+r1b1
 rr = symbol received at the input The path metric λ is the shortest distance among
 bb = branch symbol cumulative state, thus distance of the path
 Both rr and bb are dependent on the used for (Euclidean distance) is inversely proportional to
 conventional encoder. Under the basic the branch metric. After complication of
 assumption that there is no noise in the data and generating a trellis it is necessary to find survivor
 the value of r and b will vary between -1 to +1,

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 path with maximum path metric. In the above the transmission signals. Since each and every code
 solid black line is the survivor path. sequence will follow based on the trellis process
 Description of Turbo Algorithm of encoding data. Considering an example of
 Turbo algorithm is basically trellis diagram of half rate, three convolution
 implemented to decode the errors found in encoder K=3 and 15 bit messages with four
 convolution encoded sequence. As discussed the possible states shown in 4 horizontal rows with
 Turbo algorithm will make use of trellis structure dotes.
 in finding the coded sequence based on the

 Figure: 4.4.shows the trellis diagram of turbo algorithm.

 Fig. 4.5: The logic utilization of the Turbo encoder with parallel computation.

 Fig. 4.6: The logic utilization of the Turbo encoder, serial vs parallel computation.

 5. PROPOSED METHOD modern digital telecommunication.Turbo codes
 In a communication system, when data is is one of existing powerful error correcting
 transferred from the source system to a codes.Turbo codes has inspired the coding
 destination system, errors can be present in the community with the possibility of using an
 received signal at the source end. So error iterative decoding technique that relies solely on
 correction is required to retrieve the original simple constituent code to achieve close channel
 message.Turbo codes, which were first capacity. Turbo coder architecture (Fig
 introduced in 1993, represent a quantum leap in 1)comprises of turbo encoder and turbo decoder.
 channel coding techniques and a turning point for Encoder consists of two Recursive Convolutional

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 Encoders(RSC) and interleaver. In this paper, parallel concatenated turbo code. Each RSC
 pseudo-random interleaver is used due to which works on two different data. Original data is
 the interleaved version of the code tends to be provided to the first encoder, while the second
 long and scrambled, that gives good performance encoder receives the interleaved version of the
 of random codes. In turbo code implementation, input data. A specified algorithm is used to
 RSC encoders are employed rather than scramble the data bits and the method is called
 conventional convolutional encoders since it Interleaving. An appreciable impact on the
 generates low weight parity codes. MAP performance of a decoder is seen with the
 algorithm is used for the decoding of turbo interleaving algorithm when used. The RSC1 and
 encoded data in which errors are intentionally RSC2 encoder outputs along with systematic
 added and verified an error free decoded data input comprises the output of turbo encoder,that
 after decoding. is, a 24 bit output is generated which is illustrated
 6. IMPLEMENTATION in figure 6. This will be transmitted through the
 A. Architecture of Turbo Coder Turbo encoder channel to the Turbo decoder.A standard turbo
 and decoder together comprises the Turbo coder decoder block diagram is shown in Figure 3 that
 architecture(shown in figure 1).Two identical contains two modules of SISO decoders together
 Recursive convolutional encoders(RSC) and a with two pseudorandom interleavers and a
 pseudorandom interleaver constitutes the turbo pseudorandom deinterleaver.
 encoder (figure 2).LTE employs a 1/3 rate

 The usually used method of turbo code decoding and upgrade the estimate of the original
 is carried out using the BCJR algorithm.The information bits. The first and second SISO
 fundamental and basic idea behind the turbo decoder, respectively, decodes the convolutional
 decoding algorithm is the iteration between the code generated by the first or second CE.A turbo-
 two SISO part decoders which is illustrated in iteration corresponds to one pass of the first
 figure 3. It comprises a pair of decoders,those component decoder which is followed by a pass
 which work simulateneously in order to refine of the second component decoder.

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 Fig. 3. Turbo Decoder Block diagram
 B. SISO Decoder probabilities among the former and latter
 The signal which is received at the input of a soft- observations.The Forward recursion metric αi(S)
 in-softout (SISO) decoder is the real (soft)value used in decomposing is shown in Equation 2. It
 of that signal.An estimate of each input bit The provide the probabilties of state S instantly at i
 decoder then generates an approximation for each acquired from previous values from the
 data bit expressing the probability that the channel.Backward recursion metric βi(S) is also
 transmitted data bit is equal to one.The maximum used to find the probabilities of the state
 a-posteriori (MAP) algorithm is used in the turbo- calculated using the forthcoming values from
 decoder under consideration in this paper for the channel and Branch metric γ(S ,S) . P r(dsym i =
 SISO component decoder.The MAP algorithm j|y) = (Si,S)/dsym i =j αi(S )γi(S , S)βi+1(S) (2)
 never restricts the set of bit estimates to And the branch metric is given by γi(S , S) =
 correspond strictly to a valid path through the p(yi|xi).P ra(dsym i = dsym i (S , S)) (3) where,
 trellis. Therefore, the results produced by a p(yi|xi) =channel transition probability, xi = ith
 Viterbi decoder that recognizes the most likely transmitted modulated symbol and yi = ith
 true path through the trellis should differ from received symbol. For an equiprobable source, the
 those generated by that. 1) The MAP Algorithm : a priori probability is 1/2m. In Equation 1, the
 The MAP algorithm minimizes the likelihood of branch metric is adjusted to eliminate the input of
 bit error by using the entire sequence that was symbol channel.
 obtained to figure out the most likely bit at each C. Interleaver
 trellis point. Consider a frame of N coded Choosing the interleaver is a significant part of
 symbols consisting of m bits and the channel the turbo code design. Interleavers scramble data
 output received by the decoder as y. For every in a pseudorandom order to lessen the
 dsym i , a MAP decoder provides a 2m a resemblance between adjacent bits at the input of
 posteriori probabilities. The hard decision on the the convolutional encoder.The interleaver is used
 value j that is equal to dsym i , helps to maximize on both the encoder part and the decoder part. It
 the a posteriori probabilities. It is expressed produces a long block of data on the encoder side,
 injoint probabilities as: P r(dsym i = j|y) = P(dsym while it compares two SISO decoders’ output in
 i = j, y) 2m−1 k=0 (P(dsym i = k, y) (1) the decoder portion and helps to fix the error.
 Pseudo-random deinterleaver functions in a
 The trellis form of the code allows the complimentary manner of pseudo-random
 decomposition of computing the joint interleaver.

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 7. SIMULATION RESULTS Time summary

 8. CONCLUSION

 As Turbo algorithm is conceived more
 interesting and challenging for this research
 topic, it is considered, and also it has wide variety
 of applications in digital communications field.
 This research helps to generate more profits by
 the developers using Turbo algorithm. Anyone
 besides students can easily analyze these Turbo
 Simulation outcome algorithm concepts and can gain more knowledge
 about it. This research mainly concerned with
 implementation of Turbo algorithm using VHDL
 coding. Turbo algorithm has many advantages
 like low power consumption and main advantage
 is error correcting using VHDL. Anyone reading
 this document will have to gain the cognition of
 working with different tools like Xilinx ISE and
 MODELSIM.
 The chance of getting errors is more often
 because communication is a process of
 Design summary transferring data from one point to other and it
 involves a lot of coding process. By interrupting
 the original bit sequence simple bit errors can be
 solved and by using some of the important
 features of Turbo algorithm arbitrary problems
 can be solved randomly. Some of the general
 techniques for error correction are forward error
 correction (FEC), auto repeat request (ARQ),
 hybrid ARQ and error code correction (channel
 coding). C or MATLAB are the languages used
 for Turbo algorithm. Two Turbo algorithms,
 namely isolated sign language Turbo algorithm
 and continuous sign language Turbo algorithm
 are used to search the frame at all the same time.
 To find the sequence of hidden states which is

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 called as Turbo path the Turbo algorithm is used parameters are needed to be chosen and also the
 which is a dynamic programming algorithm. To required variations for the noise level predict
 verify the Turbo algorithm MATLAB code better results
 should be short. TMS320C54x DSP assembly The Turbo encoder module is designed
 language is used to write the Turbo decoding and implemented to be an embedded module in
 algorithm. the IVS modem. FPGA technologies are
 VHDL is known to be the standards of employed to develop the Turbo encoder module.
 Very High Speed Integrated Circuit (VHSIC). Xilinx tools and Verilog HDL are employed to
 The behavior of field programmable gate arrays design and simulate the module. Both serial and
 can be illustrated by this language. VHDL parallel computation techniques are studied for
 functions as a universal programming language. the encoding process. It is shown that the parallel
 VHDL resembles C and C++ languages. VHDL computation can improve the chip size and
 is mainly used to point the function of a circuit. processing time of the module. Comparing with
 VHDL is used to write a test bench to assert the the serial computation technique, the parallel
 functionality of plan using files on the host computation encoding, improves the processing
 system so that to define stimuli and the results are time by 58% and logic utilization by 73%. The
 compared with the user. processing time enhancement can be seen in both
 The main advantage of Turbo algorithm simulation and analyzing the chip processing.
 is the description will be low even in the presence Recommendations
 of more errors and the algorithm works more To attain the outturn of various hundred
 effectively. Another advantage of using this Mega Bits per second Turbo algorithm is
 Turbo algorithm is due to its cost effectiveness]. recommended to solve the problem of supplying
 For implanting this, tools used along with power in case of applications which require high
 it are MODELSIM – Simulation and XILINX- decoding throughput. By using a new coming
 ISE. ModelSim SE and ModelSim DE are the two called as relaxed Turbo algorithm, the silicon area
 basic commercial tools available. XILINX ISE is occupation and power consumption can be
 Xilinx Integrated Software Environment. Xilinx overcome, which provides even more better
 ISE is a predominant software tool for developing silicon area reduction and power saving. A less
 HDL devices and its design process. To reduce memory Turbo algorithm is recommended as the
 power consumption high speed applications and Adaptive Turbo algorithm requires very large
 the gate level simulators of Turbo decoder is used amount of logic and memory for performing the
 in these decoders. To get a proper state at time, functions. FPGA kits are used in the research for
 Turbo decoder is concerned with various the implementation. Large amount of time in
 processing elements. Two register files one write milliseconds will be spend by FPGA which is
 and read are used by the radix butterflies. The bits used by the Adaptive computing to overwrite the
 are stored using the path metric file. In multipath data and extra power consumption for charging
 fading adaptive algorithm is used. The the assemble data. FPGA guides to temporary
 throughput can be increased with the usage of the growth by this of it response time and can be fatal
 advancement of techniques in Turbo decoder. in the communication path [42].
 Finally, Turbo algorithm is successfully Therefore dynamically reconfigurable
 implemented using Verilog HDL hardware and Processors are used in order to overcome these
 tools like Xilinx and FPGA. Results that were dynamically reconfigurable devices. Low signal
 obtained are to be observed and the entire to noise ratio is observed by the problem of
 developed code working process, its design and localization principle. 3-D Turbo search is
 synthesis results can be obtained very easily recommended to overcome this trouble.
 using Xilinx ISE and FPGA editors. The Advanced versions for the algorithm are
 Adaptive Turbo algorithm requires very higher recommended as Turbo algorithm has high
 memory locations and logical programming throughput.
 capable performance the operations, so there is a Future scope
 need to less occupied memory Turbo algorithm By using FPGA device and hybrid
 architecture has to be developed. The algorithm microprocessor the decoding benefits can be

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Vol 13, Issue 05, MAY/ 2022

 ISSN NO: 0377-9254
 achieved in future. Power benefits are provided [6] Y. K. P.Cheung, G. A. Constantinides, J.T. D.
 by the integration of sequential decoding. To Sousa (2003) Field-programmable logic and
 reduce the multipath fading which damages the applications: 13th International Conference, FPL
 signals, the adaptive array technique is used for 2003, Lisbon, Portugal. New York: Springer.
 future satellite communication. The solutions of [7] J. Kia (2005) What Is a Convolutional
 the Adaptive Turbo decoding calculate on the Encoder / Convolutional Encoding. [Internet]
 chosen noise level and algorithmic parameters. available at URL:
 For independence on noise level and fixed ,
 improve the decoder performance the adaptive [accessed on 20 th November 2010].
 Turbo algorithm is carried out in reconfigurable
 hardware. [43]For power saving techniques can
 be used for the power saving architecture can be
 designed for the above decoder which is
 executable in the mobile devices. The non binary
 codes can be implemented in the future for the
 Turbo decoder. Turbo decoder is now being
 implemented in XILINX in future it can also be
 implemented using JAVA. Therefore in the
 future Turbo algorithm may be used for various
 scenarios. So in the future the complexity can be
 greatly reduced. By using M-algorithm decoding
 noise effects can also be greatly reduced.
 Bibliography:
 [1] R. E. Stake (1995) “The art of case study
 research”. USA: Sage.
 [2] K.Aleksandar, M.F. Jose (2000) “The Turbo
 Algorithm and Markov Noise Memory”.
 [Internet] available at URL:
 , [accessed on20th
 November 2010].
 [3] K. Hueske, J. Geldmacher, J. Gotze (2007)
 Adaptive decoding of convolutional codes,
 Copernicus Publications, pp. 209-214. Internet.
 (N.D) Coding in communication
 system.[Internet] available at URL:
 , [accessed on20th
 November 2010].08)e: Sprnger.
 [4] B. Tristan (2006) IMPLEMENTATION OF
 THE TURBO ALGORITHM USING
 FUNCTIONAL PROGRAMMING
 LANGUAGES. [Internet] available at URL:
 , [accessed on 20November
 2010].
 [5] K. Hucker (2001) Research Methods in
 Health, Care and Early Years. UK: Heinemann
 Publishers.

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